초록

Interface apparatus is adapted for interconnection between a host computer and a Commercial Standard Digital Bus (CSDB) for translating the CSDB signal protocol of the data frames provided over the bus by different signal sources into a signal format which is compatible with the host computer.

대표청구항 ▼

1. Apparatus, for translating the signal protocol of serial bit message blocks presented from identified signal sources over a Commercial Standard Digital Bus (CSDB) to a host computer in each of a plurality of succeeding frames, each frame including a synchronization message block followed by one o

1. Apparatus, for translating the signal protocol of serial bit message blocks presented from identified signal sources over a Commercial Standard Digital Bus (CSDB) to a host computer in each of a plurality of succeeding frames, each frame including a synchronization message block followed by one or more data message blocks, each data message block having an address byte which identifies its subject content, and a known number of data bytes, each data byte having a plurality of data bits and a parity bit, the apparatus comprising:CSDB interface circuitry, including a serial receiver for receiving the CSDB frames and for providing each at a signal output thereof, and including detection circuitry for providing a synch enable signal in response to the presence of a synchronization message in each received frame; control logic circuitry, including a receiver channel responsive to said signal output of said interface circuitry, for accepting and rejecting each received frame in the presence and absence, respectively, of said synch enable signal, and including decode circuitry for identifying the signal characteristics of each accepted frame message from its address byte, said receiver channel translating the CSDB signal protocol of each identified subject data byte to the signal protocol of the host computer and writing said translated protocol data byte to an assigned address location in signal memory; and signal memory, having a plurality of addressable signal storage locations partitioned into different address groups, each said different address group storing therein translated protocol data bytes having a different signal characteristics, as written thereto by said control logic circuitry, each said group being accessible by the host computer for retrieval of said translated protocol data bytes stored therein.