초록 ▼

Analog test instrument architecture for performing functional testing of electronic circuit assemblies is disclosed. The analog test instrument includes a plurality of identical channels, each channel including circuitry for driving test stimuli and measuring responses at one node of a circuit assem

Analog test instrument architecture for performing functional testing of electronic circuit assemblies is disclosed. The analog test instrument includes a plurality of identical channels, each channel including circuitry for driving test stimuli and measuring responses at one node of a circuit assembly under test. The driver and measurement circuitry in each channel implement functions that traditionally have been implemented in a test system using discrete instruments. The analog test instrument further includes a master clock reference, which is used for synchronizing the operation of the driver and measurement circuits. Each channel further includes triggering circuitry for distributing trigger events within the channel and to the other channels; and, an input buffer, which is shared by the measurement circuits in the channel. The synchronized operation, distributed trigger events, and shared input buffers are used to improve the correlation of measurements made during functional testing.

대표청구항 ▼

1. An apparatus for testing an electronic Unit Under Test (UUT) in an automatic test system, comprising:a trigger bus; and a plurality of channels, coupled to the trigger bus, for sourcing and measuring electrical signals at nodes of the UUT, each of the plurality of channels including an input for

1. An apparatus for testing an electronic Unit Under Test (UUT) in an automatic test system, comprising:a trigger bus; and a plurality of channels, coupled to the trigger bus, for sourcing and measuring electrical signals at nodes of the UUT, each of the plurality of channels including an input for receiving an input signal from a node of the UUT, an output for providing an output signal to a node of the UUT, at least one measurement circuit coupled to the input, at least one driver circuit coupled to the output, and a trigger circuit coupled to the input, for generating trigger signals in response to predetermined events at the input, wherein the at least one measurement circuit is constructed and arranged to operate in response to the trigger signals from the trigger circuit and trigger signals from others of the plurality of channels conveyed via the trigger bus, and wherein different ones of the plurality of channels are configurable to operate at substantially the same time in response to trigger signals originating from any one of the plurality of channels.