초록 ▼

A bandgap reference circuit comprising two NMOS transistors, where the first NMOS transistor is driven by a PTAT current source and the second transistor is driven by a PTVBE current source. The PTAT current (IPTAT) and PTVBE current (IPTVBE) are summed in a resistive circuit RX to generate the band

A bandgap reference circuit comprising two NMOS transistors, where the first NMOS transistor is driven by a PTAT current source and the second transistor is driven by a PTVBE current source. The PTAT current (IPTAT) and PTVBE current (IPTVBE) are summed in a resistive circuit RX to generate the bandgap or sub-bandgap reference voltage. The IPTAT and IPTVBE currents are generated simultaneously in separate current sources and each of these currents is then used to gate the first and second transistor, respectively. The magnitude of the bandgap or sub-bandgap reference voltage is determined by the ratio of RX and a resistive circuit in the PTVBE current source. By requiring only two transistors, in parallel, coupled to resistive circuit RX the supply voltage required for all circuits is lower than heretofore possible.

대표청구항 ▼

1. A voltage control circuit including a bandgap reference circuit, comprising:a proportional to absolute temperature (PTAT) current source which provides a PTAT current; a proportional to base to emitter voltage (PTVBE) current source which provides a PTVBE current; said PTAT current source and sai

1. A voltage control circuit including a bandgap reference circuit, comprising:a proportional to absolute temperature (PTAT) current source which provides a PTAT current; a proportional to base to emitter voltage (PTVBE) current source which provides a PTVBE current; said PTAT current source and said PTVBE current source coupled to a junction REF; said PTAT current source operably controlled by a first current source providing a current proportional to the ratio of the difference of the base to emitter voltage (.DELTA.VBE) of a first transistor and a second transistor coupled to a first resistive means in said first current source; said PTVBE current source operably controlled by a second current source providing a current proportional to the ratio of a base to emitter voltage (VBE) of a third transistor and a second resistive means in said second current source; a resistive means RX coupled between said junction REF and a reference potential, said resistive means RX configured to receive said PTAT current and said PTVBE current and in accordance therewith provide a reference voltage VREF at said junction REF which is essentially constant over temperature and which is proportional to a silicon bandgap voltage, said reference voltage VREF proportional to a said bandgap voltage of silicon (VBG) multiplied by the ratio of said resistive means RX and said second resistive means in said second current source; and said voltage control circuit operable with a voltage supply providing a voltage equal to the sum of said voltage VREF and a voltage drop across said PTAT current source.