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Semiconductor package

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/50
  • H01L-023/495
  • H01L-023/34
  • H01L-023/48
출원번호 US-0476825 (2000-01-03)
발명자 / 주소
  • Jorge Munoz
  • Rod DeLeon
출원인 / 주소
  • International Rectifier Corporation
대리인 / 주소
    Ostrolenk, Faber, Gerb & Soffen, LLP
인용정보 피인용 횟수 : 45  인용 특허 : 16

초록

A semiconductor package includes a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion; at least one second terminal being co-planar with the first terminal; a semiconductor power MOSFET die having a bottom surface defining a drain c

대표청구항

1. A power semiconductor package, comprising: a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion; at least one second terminal being co-planar with the first terminal; a semiconductor power MOSFET die having a bottom surface defi

이 특허에 인용된 특허 (16)

  1. Davis Christopher ; Cheah Chuan ; Kinzer Daniel M., Commonly housed diverse semiconductor die.
  2. Davis Christopher ; Connah Glynn,GBX, Commonly housed diverse semiconductor die with reduced inductance.
  3. Schlieffers Joerg ; Jones Gregory G., Data acquisition device having a resilient seal interposed between the head portion and the handle portion for rest stand.
  4. Ewer Peter R.,GBX ; Steers Mark,GBX, High current capacity semiconductor device housing.
  5. Adishian Gary C., Kilowatt power transistor.
  6. Kudo Yoshimasa (Yokohama JPX), Mold-type semiconductor device.
  7. Matsuda Ohki (Kadoma JPX) Miyamoto Yasunori (Kadoma JPX), Operation displaying semiconductor switch.
  8. Woodworth Arthur,GBX ; Pearson George,GBX ; Ewer Peter Richard,GBX, Plural semiconductor die housed in common package with split heat sink.
  9. Kalfus Martin (Scottsdale AZ) Gooch Robert A. (Mesa AZ), Self-centering electrode for power devices.
  10. Nishi Kunihiko (Kokubunji JPX) Tanimoto Michio (Kokubunji JPX) Yasuhara Toshihiro (Kokubunji JPX) Tabata Katsuhiro (Higashimurayama JPX) Yoshikawa Yasuhiro (Kodaira JPX) Akima Isao (Fussa JPX) Kunito, Semiconductor device and an electronic device with the semiconductor devices mounted thereon.
  11. Kock Hendrikus G. (Eindhoven NLX), Semiconductor device comprising projecting contact layers.
  12. Sonobe Masayuki,JPX ; Tsutsui Tsuyoshi,JPX ; Nakata Shunji,JPX ; Itoh Norikazu,JPX ; Isokawa Shinji,JPX ; Toda Hidekazu,JPX, Semiconductor light emitting device having a protecting device.
  13. Cheah Chuan ; Munoz Jorge ; Kinzer Dan, Semiconductor package.
  14. Kinzer Daniel M. (El Segundo CA), Surface mount package with improved heat transfer.
  15. Williams Richard K. (Cupertino CA) Kasem Mohammad (Santa Clara CA), Vertical power mosfet having thick metal layer to reduce distributed resistance.
  16. Fillion Raymond A. (Schenectady NY) Mueller Otward M. (Ballston Lake NY) Burgess James F. (Schenectady NY), Wireless radio frequency power semiconductor devices using high density interconnect.

이 특허를 인용한 특허 (45)

  1. Hauenstein, Henning M.; Gorgerino, Andrea, Bondwireless power module with three-dimensional current routing.
  2. Korec, Jacek; Xu, Shuming; Dai, Wenhua, Chip scale power LDMOS device.
  3. Cheah, Chuan; Shivkumar, Bharat, Contact structure for semiconductor device.
  4. Lo Verde, Domenico; Bruno, Giuseppe, Electric connection structure for electronic power devices, and method of connection.
  5. Estacio,Maria Cristina B.; Quinones,Maria Clemens Y., Flip clip attach and copper clip attach on MOSFET device.
  6. Sun, Ming; Zhang, Xiaotian; Shi, Lei, High current semiconductor power device SOIC package.
  7. Lopez,Osvaldo Jorge; Antiporta,Mark Henry S.; Capinig,Fernando V.; Calustre,Ricky B.; Anacleto,Emmievel S.; Mijares,Mizpa B., Method of making a packaged semiconductor device.
  8. Horie, Yoshitaka, Method of making wireless semiconductor device, and leadframe used therefor.
  9. Horie, Yoshitaka, Method of making wireless semiconductor device, and leadframe used therefor.
  10. Petitbon, Alain; Martin, Nathalie; Jorda, Xavier; Godignon, Philippe; Flores, David, Method of manufacturing an electronic power component, and an electronic power component obtained thereby.
  11. Landau, Stefan; Koenigsberger, Alexander; Mahler, Joachim; Schiess, Klaus, Method of manufacturing an integrated circuit module.
  12. Sun, Ming; Liu, Kai; Zhang, Xiaotian; Ho, Yueh Se; Luo, Leeshawn, Methods and configuration for manufacturing flip chip contact (FCC) power package.
  13. Lu, Jun; Sun, Ming; Ho, Yueh-Se; Liu, Kai; Shi, Lei, Multi-layer lead frame package and method of fabrication.
  14. Shimodaira,Kazuhiko; Matsuzawa,Juichiro; Koyama,Yugo, Oscillator.
  15. Ashrafzadeh, Ahmad R.; Mikolajczak, Adrian; Wu, Chung-Lin; Estacio, Maria Cristina, Packaged semiconductor devices and methods of manufacturing.
  16. Luo,Leeshawn; Bhalla,Anup; Lui,Sik K.; Ho,Yueh Se; Chang,Mike F.; Zhang,Xiao Tian, Power semiconductor package.
  17. Xu,Shuming; Korec,Jacek, Quasi-vertical LDMOS device having closed cell layout.
  18. Carney,Francis J.; Pearse,Jeffrey; St. Germain,Stephen, Robust power semiconductor package.
  19. Ewe, Henrik; Mahler, Joachim; Mengel, Manfred; Engl, Reimund; Hoeglauer, Josef; Dangelmaier, Jochen, Semiconductor device.
  20. Moriguchi, Koji, Semiconductor device.
  21. Hirashima, Toshinori; Kishimoto, Munehisa; Hata, Toshiyuki; Takahashi, Yasushi, Semiconductor device and a method of manufacturing for high output MOSFET.
  22. Maruoka, Michiaki, Semiconductor device having bonding pad electrode of multi-layer structure.
  23. Kawano, Takahiro; Ogata, Kenichi; Yoneda, Tatsuo, Semiconductor device including gate wiring, main electrodes and connecting plate connected onto said main electrodes.
  24. Herbsommer, Juan Alejandro; Noquil, Jonathan A.; Lopez, Osvaldo J., Semiconductor device package and method of assembly thereof.
  25. Xiaochun,Tan; Jingping,Shi, Semiconductor device with interlocking clip.
  26. Xiaochun,Tan; Jingping,Shi, Semiconductor device with interlocking clip.
  27. Yanagisawa, Satoshi, Semiconductor device with semiconductor chip mounted in package.
  28. Hata, Toshiyuki; Otani, Takeshi; Shimizu, Ichio, Semiconductor device with surface mounting terminals.
  29. Xiaochun, Tan, Semiconductor devices with conductive clips.
  30. Xiaochun, Tan, Semiconductor devices with multiple heat sinks.
  31. Lopez,Osvaldo Jorge, Semiconductor die package.
  32. Cruz, Erwin Victor R.; Cabahug, Elsie; Shian, Ti Ching; Iyer, Venkat, Semiconductor die package using leadframe and clip and method of manufacturing.
  33. Minotti, Agatino Carmelo; Lo Piparo, Alessandro, Semiconductor element with semiconductor die and lead frames.
  34. Otremba, Ralf; Hoeglauer, Josef; Schiess, Klaus, Semiconductor module.
  35. Otremba, Ralf; Hoeglauer, Josef; Schiess, Klaus, Semiconductor module.
  36. Otremba, Ralf; Schloegel, Xaver; Schiess, Klaus; Lai, Charlie Tan Tien, Semiconductor module.
  37. Otremba, Ralf; Schloegel, Xaver; Schiess, Klaus; Tan, Tien Lai, Semiconductor module.
  38. Yoshizaki, Atsuhiro; Mashino, Keiichi; Anan, Hiromichi; Ochiai, Yoshitaka, Semiconductor module and power conversion device.
  39. Sato,Nobuyuki, Semiconductor module having heat sink serving as wiring line.
  40. Aki,Motonari; Maeda,Taiji, Shielding leadframe for semiconductors for optical coupling and electronic apparatus including same.
  41. Standing, Martin; Sawle, Andrew Neil, Surface mounted package with die bottom spaced from support board.
  42. Standing,Martin; Sawle,Andrew N, Surface mounted package with die bottom spaced from support board.
  43. Yagi, Katsunori, Switching device, generator-motor apparatus using switching device, drive system including generator-motor apparatus, and computer-readable recording medium on which a program for directing computer to perform control of generator-motor apparatus is recorded.
  44. Yagi,Katsunori, Switching device, generator-motor apparatus using switching device, drive system including generator-motor apparatus, and computer-readable recording medium on which a program for directing computer to perform control of generator-motor apparatus is recorded.
  45. Herbsommer, Juan A; Przybylek, George J; Lopez, Osvaldo J, Wirebond-less semiconductor package.
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