$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Register setting-micro programming system

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/16
출원번호 US-0025507 (1998-02-18)
우선권정보 AU-0006480 (1997-04-30); AU-0006481 (1997-04-30); AU-0006482 (1997-04-30); AU-0006485 (1997-04-30); AU-0006488 (1997-04-30); AU-0006489 (1997-04-30); AU-0006490 (1997-04-30); AU-0006491 (1997-04-30); AU-0006492 ()
발명자 / 주소
  • Ian Gibson AU
출원인 / 주소
  • Canon Kabushiki Kaisha JP
대리인 / 주소
    Fitzpatrick, Cella, Harper & Scinto
인용정보 피인용 횟수 : 15  인용 특허 : 141

초록

A graphics processor includes a plurality of interrelated functional modules and at least one register associated with each of the functional modules. The plurality of interrelated functional modules are interconnected by a data pipeline for conveying data, and each register is configured to control

대표청구항

1. A graphics processor comprising:a plurality of interrelated functional modules, wherein the plurality of interrelated functional modules are interconnected by a data pipeline for conveying data; at least one register associated with each of the functional modules, each register being configured t

이 특허에 인용된 특허 (141)

  1. Rodman Paul K. (Ashland MA), Address translation systems for high speed computer memories.
  2. Urushibata Yukio (Tokyo JPX), Affine conversion apparatus using a raster generator to reduce cycle time.
  3. Cutler David N. (Bellevue WA) Orbits David A. (Redmond WA) Bhandarkar Dileep (Shrewsbury MA) Cardoza Wayne (Merrimack NH) Witek Richard T. (Littleton MA), Apparatus and method for main memory unit protection using access and fault logic signals.
  4. Furukawa Shigehiro (Kanagawa JPX) Hayashi Kazuo (Kanagawa JPX) Takayanagi Hiroshi (Kanagawa JPX), Apparatus and method for reconfiguring an image processing system to bypass hardware.
  5. Newberger Edward (90 Huntington Ave. - Apt. #104 Buffalo NY 14214) Sher David (Amherst NY), Apparatus for utilizing a discrete fourier transformer to implement a discrete cosine transformer.
  6. Park Ju-ha (Suwon KRX) Jeon Byeung-woo (Sungnam KRX) Jeong Jechang (Seoul KRX), Apparatus for variable-length coding and variable-length-decoding using a plurality of Huffman coding tables.
  7. Alcorn Byron A. (Fort Collins CO) Cherry Robert W. (Loveland CO) Coleman Mark D. (Fort Collins CO) Rauchfuss Brian D. (Fort Collins CO), Arithmetic and logic processing unit for computer graphics system.
  8. Heil Thomas F. (Easley SC), Bus system with cache snooping signals having a turnaround time between agents driving the bus for keeping the bus from.
  9. McClure David C. (Carrollton TX), Cache tag memory having first and second single-port arrays and a dual-port array.
  10. Gibson Ian,AUX ; Wong Kevin Chee-Hoong,AUX, Cached color conversion method and apparatus.
  11. Hicok Gary D. (Mesa AZ) Lehman Judson A. (Scottsdale AZ), Caching FIFO and method therefor.
  12. Hicok Gary D. (Mesa AZ) Lehman Judson A. (Scottsdale AZ) Alexander Thomas (Hillsboro OR) Lim Yong J. (Seattle WA) Evoy David R. (Tempe AZ) Kim Yongmin (Seattle WA), Central processing unit data entering and interrogating device and method therefor.
  13. Oh Su-Whan (Suwon KRX), Circuit for controlling generation of an acknowledge signal and a busy signal in a centronics compatible parallel interf.
  14. Mukherjee Amar (Maitland FL), Code converter for data compression/decompression.
  15. Dalrymple John C. (Portland OR) Welborn Patrick E. (Lake Oswego OR) Shaver Christopher D. (Tigard OR), Color processing system.
  16. Stone Jonathan J. (Reading GB2) Hurley Terence R. (Newbury GB2), Compression of video signals.
  17. Stoney Graham,AUX, Coprocessor interface having pending instructions queue and clean-up queue and dynamically allocating memory.
  18. Mischler Denis (Acigne FRX) Le Pannerer Yves (St. Gregoire FRX), Cosine transform computing devices, and image coding devices and decoding devices comprising such computing devices.
  19. Uramoto Shinichi (Hyogo JPX) Inoue Yoshitsugu (Hyogo JPX), DCT/IDCT processor and data processing method.
  20. Bledsoe Robert E. (Miami FL), Data communication with modified Huffman coding.
  21. Bledsoe Robert E. (Miami FL), Data communication with modified Huffman coding.
  22. Wise Adrian Philip,GBX ; Sotheran Martin William,GBX ; Robbins William Philip,GBX, Data pipeline system and data encoding method.
  23. Fukuda Masahiro (Isehara JPX) Noda Tsugio (Isehara JPX), Data processing apparatus for compressing and reconstructing image data.
  24. Edenfield Robin W. (Austin TX) McGarity Ralph (Austin TX) Reininger Russell (Austin TX) Ledbetter ; Jr. William B. (Austin TX) Shahan Van B. (Austin TX), Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data.
  25. Mayer Steven T. (Auburn CA) Miner Jay G. (Sunnyvale CA) Neubauer Douglas G. (Santa Clara CA) Decuir Joseph C. (Mountain View CA), Data processing system with programmable graphics generator.
  26. Matsumoto Hideaki (Ibaraki JPX) Bandoh Tadaaki (Ibaraki JPX) Maejima Hideo (Ibaraki JPX), Data processing unit with pipelined operands.
  27. Kubota Kazumi (Tokyo JPX) Tsujioka Shigeo (Yokohama JPX) Ooyu Kensuke (Otaru JPX) Kawaguchi Hitoshi (Yokohama JPX) Uchida Mitsutoshi (Hadano JPX) Kurosu Yasuo (Yokohama JPX), Data transfer control method and apparatus for co-processor system.
  28. Kanayama Hideaki (Yokohama JPX), Decoding apparatus for codes represented by code tree.
  29. Watanabe Mikio (Tokyo JPX) Moronaga Kenji (Tokyo JPX), Device for coding a picture signal by compression.
  30. Daly Scott J. (W. Henrietta NY) Rabbani Majid (Rochester NY) Chen Cheng-Tie (Rochester NY), Digital image compression and transmission system visually weighted transform coefficients.
  31. Chambers James M. (Carlsbad CA), Digital image convolution processor method and apparatus.
  32. Kerr Richard (Rochester NY) Krogstad Robert (Rochester NY), Digital image interpolator using a plurality of interpolation kernals.
  33. Rousseau Jean-Francois (Saint Pierre les Nemours FRX) Obriot Bertrand (La Grande Paroisse FRX), Digital image processing circuitry.
  34. Murakami Tokumichi (Kanagawa JPX) Kamizawa Koh (Kanagawa JPX) Kameyama Masatoshi (Kanagawa JPX), Digital signal processor.
  35. Miyazaki Takashi (Tokyo JPX), Discrete cosine transform circuit suitable for integrated circuit implementation.
  36. Widergren, Robert D.; Chen, Wen-Hsiung; Fralick, Stanley C.; Tescher, Andrew G., Discrete cosine transformer.
  37. Uetani Yoshiharu (Kawasaki JPX), Discrete cosine transforming apparatus.
  38. Uetani Yoshiharu (Kawasaki JPX), Discrete cosine transforming apparatus.
  39. Asai Nobuteru (Hitachi JPX) Kuwabara Tadashi (Yokohama JPX) Sakai Yasuo (Hitachi JPX), Display apparatus having an image memory controller utilizing a barrel shifter and a mask controller preparing data to b.
  40. Small Jeffrey A. (Rochester NY) Torok Alan T. (Fairport NY), Dram interface adapter circuit.
  41. Gilbert John M. (Minneapolis MN) Luckis Lawrence J. (Prior Lake MN) Steidel Leonard R. (Prior Lake MN), Duty cycle technique for a non-gray scale anti-aliasing method for laser printers.
  42. Tokuume Takahiro (Tokyo JPX), Dynamic memory refresh circuit with a flexible refresh delay dynamic memory.
  43. Amitai Zwie (Sunnyvale CA), Dynamic random access memory controller with multiple independent control channels.
  44. Malinowski Christopher W. (Melbourne Beach FL), East image processing accelerator for real time image processing applications.
  45. Dornier Pascal (Sunnyvale CA) Kikinis Dan (Sratoga CA) Seiler William J. (Scotts Valley CA) Jacobs William S. (Santa Cruz CA), Expansion bus system for replicating an internal bus as an external bus with logical interrupts replacing physical inter.
  46. Elbourne Trevor Robert,AUX ; Pulver Mark,AUX, Fast DCT apparatus.
  47. Kao Jinn-Nan (Hsinchu TWX), Fast pipelined 2-D discrete cosine transform architecture.
  48. Wang Jinn-Shyan (Hsin Chu TWX) Kao Jinn-Nan (Taipei TWX), Fast pipelined matrix multiplier.
  49. Guttag Karl (Houston TX) Asal Mike (Sugarland TX) Novak Mark (Colorado Springs CO), Graphics data processing apparatus for graphic image operations upon data of independently selectable pitch.
  50. Callemyn Jean-Michel (Nogent Sur Marne FRX), Graphics system with graphics controller and DRAM controller.
  51. Coffield Patrick C. (Shalimar FL), High performance architecture for image processing.
  52. Bechtolsheim, Andreas, High-speed memory and memory management system.
  53. Tsuchiya Kenichi (New Brighton MN) Adelmeyer Thomas J. (Hillsboro OR), Hit enhancement circuit for page-table-look-aside-buffer.
  54. Kinouchi Shigenori (Tokyo JPX) Sawada Akira (Tokyo JPX), Huffman code decoding circuit.
  55. Allen James (Castro Valley CA) Boliek Martin (Palo Alto CA) Schwartz Edward L. (Sunnyvale CA) Bednash David (Palo Alto CA), Huffman decoder architecture for high speed operation and reduced memory.
  56. Hatori Yoshinori (Kanagawa JPX) Koga Toshio (Tokyo JPX) Matsuda Kiichi (Kanagawa JPX) Mukawa Naoki (Kanagawa JPX), Image coding system coding digital image signals by forming a histogram of a coefficient signal sequence to estimate an.
  57. Kopet Thomas G. (Colorado Springs CO) Taylor Bradford G. (Colorado Springs CO) Lui Kuo Gerry C. (Colorado Springs CO) Lew Stephen D. (Colorado Springs CO), Image compression coprocessor with data flow control and multiple processing units.
  58. Kojima Akio (Neyagawa JPX), Image controller.
  59. Sakagami Koubun (Yokohama JPX) Tanaka Masafumi (Osaka JPX) Maeda Eiichi (Kawasaki JPX), Image data processing apparatus.
  60. Sato Mamoru (Tokyo JPX) Osawa Hidefumi (Urawa JPX) Kawamura Naoto (Yokohama JPX), Image processing apparatus.
  61. Sano Masaki (Tokyo JPX) Hanyu Yoshiaki (Tokyo JPX) Takahashi Nobuharu (Kawasaki JPX), Image processing apparatus for multi-media copying machine.
  62. Kumagai Ryohei (Tama JPX), Image processing system.
  63. Okamoto Ichiro (Yokohama JPX), Image signal compression apparatus and method using variable length encoding.
  64. Tsuchiya Tadashi (Hadano JPX) Fujisaki Hiroo (Hadano JPX) Nishi Tomoya (Sapporo JPX) Murakami Hiromichi (Hadano JPX), Image signal decoding system for decoding modified Huffman codes at high speeds.
  65. Nakamura Kouzou,JPX ; Yokosuka Yasushi,JPX, Image signal processing apparatus and information transmission/reception apparatus.
  66. Murakami Tokumichi (Kanagawa JPX) Asai Kohtaro (Kanagawa JPX) Matsuzaki Kazuhiro (Kanagawa JPX), Image transformation coding device with adaptive quantization characteristic selection.
  67. Kimata Naohiro (Tokyo JPX) Yoshida Takayoshi (Tokyo JPX) Oyake Ikuo (Tokyo JPX), Image transformation method and device.
  68. Yamauchi Tomonari (Kanagawa JPX) Yamada Kazuya (Kanagawa JPX) Terao Taro (Kanagawa JPX) Nagao Takashi (Kanagawa JPX) Yamada Toshiya (Kanagawa JPX), Image-edit processing apparatus.
  69. Ng Yee S. (Fairport NY), Input scanner color mapping and input/output color gamut transformation.
  70. Stones Mitchell A. (Phoenix AZ), Intelligent programmable dram interface timing controller.
  71. Warriner R. John (Amherst MA) Lankarge Mark J. (South Deerfield MA), Interface for establishing a number of consecutive time frames of bidirectional command and data block communication bet.
  72. Phillips Forrest M. (Chelmsford MA), Least recently used replacement level generating apparatus and method.
  73. Shibata Koichi (Hachiouji JPX) Takizawa Masaaki (Suginami JPX), Matrix multiplier and picture transforming coder using the same.
  74. Kumagai Ryohei (Tokyo JPX) Yang Weikang (Tokyo JPX), Memory control device.
  75. Higginbottom Raymond Paul,AUX, Memory controller architecture.
  76. Ruetz Peter (Redwood City CA) Tong Po (Fremont CA), Method and apparatus for decoding Huffman codes.
  77. Weaver Charles S. (Palo Alto CA), Method and apparatus for digital Huffman decoding.
  78. Butterfield Stephen R. (Manhattan Beach CA) Phillips Donald E. (Garden Grove CA) Renshaw Barbara B. (Manhattan Beach CA) Nelson Steven K. (Harbor City CA) Hossley Robert F. (El Segundo CA), Method and apparatus for displaying a page with graphics information on a continuous synchronous raster output device.
  79. Butterfield Stephen R. (Manhattan Beach CA) Phillips Donald E. (Garden Grove CA) Renshaw Barbara B. (Manhattan Beach CA) Nelson Steven K. (Harbor City CA) Hossley Robert F. (El Segundo CA), Method and apparatus for displaying a page with graphics information on a continuous synchronous raster output device.
  80. Hourvitz Leonard J. (La Honda CA) Newlin John K. (Palo Alto CA) Page Richard A. (Los Altos Hills CA), Method and apparatus for displaying a plurality of graphic images.
  81. Clark Cary (San Jose CA), Method and apparatus for generating and manipulating graphical data for display on a computer output device.
  82. Atkinson William D. (Los Gatos CA), Method and apparatus for image compression and manipulation.
  83. Trent Robert J. (Coquitlam CAX), Method and apparatus for image data processing.
  84. Pratt William K. (Santa Monica CA) Abramatic Jean-Francois (Versailles FRX) Faugeras Olivier (Saint Nom La Breteche FRX 4), Method and apparatus for improved digital image processing.
  85. Gentile Ronald S. (Atherton CA), Method and apparatus for processing data for a visual-output device with reduced buffer memory requirements.
  86. Gentile Ronald S. (Atherton CA), Method and apparatus for processing data for a visual-output device with reduced buffer memory requirements.
  87. Gentile Ronald S. (Atherton CA), Method and apparatus for processing data for a visual-output device with reduced buffer memory requirements.
  88. Gentile Ronald S. (Atherton CA), Method and apparatus for processing data for a visual-output device with reduced buffer memory requirements.
  89. Meinerth, Kim; Case, Colyn; Moezzi, Ali; Irwin, John; Masucci, Agnes; Krishnaswami, Srinivasan, Method and apparatus for transmitting graphics command in a computer graphics system.
  90. Nakamura Kozo (Hitachiota JPX) Yokosuka Yasushi (Nakaminato JPX) Kozima Yasuyuki (Hitachi JPX), Method and appratus for decoding and printing coded image, and facsimile apparatus, filing apparatus and communication a.
  91. Neustaedter Tarl (Ashland MA), Method for inter-processor data transfer.
  92. Goto Harutaka (Yokohama JPX), Microprocessor with two groups of internal buses.
  93. Barry Michael J. (W. Henrietta NY) Melnychuck Paul W. (W. Henrietta NY) Weldy John A. (Rochester NY), Modified huffman encode/decode system with simplified decoding for imaging systems.
  94. Fedele Nicola J. (Kingston NJ), Modified statistical coding of digital signals.
  95. Speiser Jeffrey M. (San Diego CA) Federhen Herbert M. (San Diego CA), Modular discrete cosine transform system.
  96. Beausoleil William F. (Hopewell Junction NY) Ng Tak-Kwong (Hyde Park NY), Most recently used address translation system with least recently used (LRU) replacement.
  97. Sporer Michael ; Kline Mark H. ; Zawojski Peter, Motion video processing circuit for capture playback and manipulation of digital motion video information on a computer.
  98. Anderson Karen L. (Mohegan Lake NY) Finlay Ian R. (Ontario NY CAX) Mitchell Joan L. (Ossining NY) Thornton Davey S. (Germantown MD), Multi-mode data stream generator.
  99. Lumelsky Leon (Stamford CT) Choi Sung M. (White Plains NY) Peevers Alan W. (Berkeley CA) Pittas John L. (Bethel CT), Multi-source image real time mixing and anti-aliasing.
  100. Kobayashi Yoshiki (Hitachi JPX) Fukushima Tadashi (Hitachi JPX) Okuyama Yoshiyuki (Hitachi JPX) Hirasawa Kotaro (Hitachi JPX) Katoh Takeshi (Hitachi JPX) Kubo Yutaka (Hitachi JPX), Multifunctional image processor.
  101. Lemaire Charles A. (Zumbrota MN) Wottreng Andrew H. (Rochester MN), Multiprocessor system having multiple classes of instructions for purposes of mutual interruptibility.
  102. Arbeiter James H. (Hopewell NJ), Non-destructive lossless image coder.
  103. Tanaka Masafumi (Osaka JPX) Imai Yukihiro (Kawanishi JPX) Sakamoto Kazuo (Kobe JPX) Fujii Tatsuya (Nishinomiya JPX), Orthogonal transformation arithmetic unit.
  104. Lentz Derek J. (Los Gatos CA) Wang Johannes (San Mateo CA) Deosaran Trevor (Sunnyvale CA) Young Linley M. (La Jolla CA) Yap Kian-Chin (San Jose CA) Nguyen Le Trong (Monte Sereno CA) Matsubayashi Mako, Page printer controller including a single chip superscalar microprocessor with graphics functional units.
  105. Heil Thomas F. (Easley SC), Peripheral component interconnect “always on”protocol.
  106. Lumelsky Leon (Stamford CT) St. Clair Joe C. (Round Rock TX) Mansfield Robert L. (Austin TX) Segre Marc (Rhinebeck NY) Spencer Alexander K. (Austin TX), Pixel data path for high performance raster displays with all-point-addressable frame buffers.
  107. Kocis Thomas J. (Austin TX) Patterson Anthony K. (Austin TX), Predictive addressing architecture.
  108. Chabert Bernard (Vinay FRX), Process for the processing of digitized signals representing an original image.
  109. Nickerson Brian (Aloha OR), Process, apparatus and system for decoding variable-length encoded signals.
  110. Statt David J. (Rochester NY) Hunt William E. (Rochester NY) Warda Mark R. (Fairport NY) Huthsteiner Theodore (Rochester NY), Raster image processor for all points addressable printer.
  111. Mueller David J. (Naperville IL) Prysby Daniel G. (Elk Grove IL) Moravec John V. (Willow Springs IL) Watson George A. (Fullerton CA), Reactive computer system adaptive to a plurality of program inputs.
  112. Rupp Charle R., Reconfigurable computer architecture for use in signal processing applications.
  113. Friedlander Rami (Haifa ILX) Retter Rafi (Haifa ILX), Recycling DCT/IDCT integrated circuit apparatus using a single multiplier/accumulator and a single random access memory.
  114. Agarwal Rohit (Beaverton OR), Scan path for encoding and decoding two-dimensional signals.
  115. Bhandari Rajan (Basingstoke GBX) Gillard Clive H. (Basingstoke GBX), Serial data decoding for variable length code words.
  116. Hsu Ken W. (Pittsford) D\Luna Lionel J. (Rochester) Yeh Hur Jay (Rochester) Brown Glen W. (Fairport NY), Single chip, mode switchable, matrix multiplier and convolver suitable for color image processing.
  117. Kopp Randall L. (Irvine CA) Johnson S. Val (Anaheim CA), Single-chip self-configurable parallel processor.
  118. Itomitsu Fujio (Itami JPX) Saito Yuuichi (Itami JPX), Store processing method in a pipelined cache memory.
  119. Venable Dennis L. (Rochester NY) Campanelli Michael R. (Webster NY) Fuss William A. (Rochester NY) Bollman James E. (Williamson NY) Nagao Takashi (Kanagawa JPX) Yamada Toshiya (Kanagawa JPX) Yamada K, Structured image (Sl) format for describing complex color raster images.
  120. Spencer George L. (Longwood FL) Duvoisin ; III Herbert A. (Orlando FL) Vasicek Jean (Orlando FL), Superresolution image enhancement for a SIMD array processor.
  121. Cucchi Silvio (Milan) Fratti Marco (Milan ITX), System and circuit for the calculation of the bidimensional discrete transform.
  122. Dean Mark E. (Austin TX), System and method for prefetching information in a processing system.
  123. Giuliano Ercole (Genoa ITX) Musso Giorgio (Genoa ITX), System enabling high-speed convolution processing of image data.
  124. Balkanski Alexandre (Palo Alto CA) Purcell Stephen C. (Mountain View CA) Kirkpatrick ; Jr. James W. (San Jose CA) Bonomi Mauro (Palo Alto CA) Hsu Wen-Chang (Saratoga CA), System for compression and decompression of video data using discrete cosine transform and coding techniques.
  125. Balkanski Alexandre (San Francisco CA) Purcell Steve (Mountain View CA) Kirkpatrick James (San Jose CA), System for compression and decompression of video data using discrete cosine transform and coding techniques.
  126. Balkanski Alexandre (San Francisco) Purcell Steve (Mountain View) Kirkpatrick James (San Jose CA), System for compression and decompression of video data using discrete cosine transform and coding techniques.
  127. Balkanski Alexandre (San Franciso CA) Purcell Steve (Mountain View CA) Kirkpatrick James (San Jose CA), System for compression and decompression of video data using discrete cosine transform and coding techniques.
  128. Hetherington Ricky C. (Northboro MA) Webb ; Jr. David A. (Berlin MA) Fite David B. (Northboro MA) Murray John E. (Acton MA) Fossum Tryggve (Northboro MA) Manley Dwight P. (Holliston MA), System for translation of virtual to physical addresses by operating memory management processor for calculating locatio.
  129. Webb Michael John,AUX ; Gibson Ian,AUX, Transformation of a first dataword received from a FIFO into an input register and subsequent dataword from the FIFO into a normalized output dataword.
  130. Meinerth Kim (Middleton MA) Case Colyn (Amherst NH) Franklin Chris (Merrimack NH) Fanning Blaise (Overland Park KS) Gamache Rodney (Merrimack NH), Translation of virtual addresses in a computer graphics system.
  131. Jang Yi-Feng (Keelung TWX) Kao Jinn-Nan (Hsinchu TWX) Huang Po-Chuan (Hsinchu TWX), Transpose memory for DCT/IDCT circuit.
  132. Liou Ming-Lei (Holmdel NJ) Sun Ming-Ting (Holmdel NJ) Wu Lancelot (East Keansburg NJ), Two-dimensional discrete cosine transform processor.
  133. Ozaki Nozomu (Kanagawa JPX), Variable length code decoder utilizing a predetermined prioritized decoding arrangement.
  134. Pollmann Stephen C. (Santee CA) Moroney Paul (Olivenhain CA) Krause Edward A. (San Diego CA) Shen Paul (San Diego CA) Paik Woo H. (Encinitas CA), Variable length code word decoder for use in digital communication systems.
  135. Chen Yueh-Chang (Chang-Hua TWX), Variable length coding system.
  136. Chu Ke-Chiang (Saratoga CA) Normile James O. (Sunnyvale CA) Yeh Chia L. (Saratoga CA) Wright Daniel W. (Sunnyvale CA), Variable length decoding using lookup tables.
  137. Carrick Paul (Los Gatos CA), Vector selectable coordinate-addressable DRAM array.
  138. Kim Hoyoung, Video interface and overlay system and process.
  139. Hester Phillip D. (Austin TX) Simpson Richard O. (Austin TX), Virtual memory address translation mechanism with combined hash address table and inverted page table.
  140. Khalidi Yousef A. (Sunnyvale CA) Talluri Madhusudhan (Madison WI) Williams Dock G. (Sunnyvale CA) Joshi Vikram P. (Fremont CA), Virtual memory computer apparatus and address translation mechanism employing hashing scheme and page frame descriptor t.
  141. Christopher Lauren A. (Weedsport NY) Reitmeier Glenn A. (Trenton NJ) Smith Terrence R. (Clementon NJ) Strolle Christopher H. (Philadelphia PA), Window-scanned memory.

이 특허를 인용한 특허 (15)

  1. Bartley, Gerald Keith; Borkenhagen, John Michael; Hovis, William Paul; Rudrud, Paul, Dynamic reconfiguration of solid state memory device to replicate and time multiplex data over multiple data interfaces.
  2. Brinkmann, Jr., Hubert E.; Callison, Ryan A., Dynamic routing of data across multiple data paths from a source controller to a destination controller.
  3. Yamashita,Yujiro, Image processing apparatus.
  4. Baker,David; Basoglu,Christopher; Cutler,Benjamin; Deeley,Richard; Gervasio,Gregorio; Kawaguchi,Atsuo; Kojima,Keiji; Lee,Woobin; Miyazaki,Takeshi; Mundkur,Yatin; Naik,Vinay; Nishioka,Kiyokazu; Nojiri,Toru; O'Donnell,John; Padalkar,Sarang, Integrated multimedia system.
  5. Winkeler,Keith E.; Austin,Paul F., Network system including data socket components for accessing internet semaphores.
  6. Teng, Tom, Parity-scanning and refresh in dynamic memory devices.
  7. Teng,Tom, Parity-scanning and refresh in dynamic memory devices.
  8. Teng,Tom, Parity-scanning and refresh in dynamic memory devices.
  9. Gong, Danian, Programmable video signal processor for video compression and decompression.
  10. Van Dyke,Phil; Rai,Barinder Singh, System and method for programming a controller.
  11. Osborne, John; Russell, David W., System and method of storing data in JPEG files.
  12. Bordes, Jean Pierre; Davis, Curtis; Hegde, Manju, System with PPU/GPU architecture.
  13. Nordback, Kurt Nathan, Systems and methods for data compression.
  14. Nordback, Kurt Nathan, Systems and methods for multi-mode color blending.
  15. Nordback, Kurt Nathan, Systems and methods of trapping for print devices.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트