초록 ▼

A processor for executing several functions. The processor has access to an addressable space including memories for program and for data and input/output registers. The method of operation includes the allocation of a right of access to each function, the dividing of the addressable space and of pa

A processor for executing several functions. The processor has access to an addressable space including memories for program and for data and input/output registers. The method of operation includes the allocation of a right of access to each function, the dividing of the addressable space and of partitions, each associated with the access right of a function, and the dividing of the time of use of the processor into cyclic time slices associated with the access right of a function. At the start of each new time slice, it is confirmed that the processor has terminated the execution of the previous function. The method further includes the activation of the tasks of the corresponding function. During each access by a processor to an addressable area, the access right of the current time slice is compared with that associated with the accessed are, with an error signal being transmitted in case of an inconsistency.

대표청구항 ▼

1. Method for the execution by a single processor of several functions each grouping together several tasks, the processor having addressing access to an addressable space including memories for a program and for data, and input and output registers allowing the processor to communicate with its env

1. Method for the execution by a single processor of several functions each grouping together several tasks, the processor having addressing access to an addressable space including memories for a program and for data, and input and output registers allowing the processor to communicate with its environment, wherein the method comprises the steps of:allocating a right of access to each function to be executed by the processor, dividing the space addressable by the processor into addressable partitions and associating each addressable partition with the access right of one of the functions, in such a way as to allow each function to access at least one addressable partition, dividing the time of use of the processor into cyclic time slices, and associating each cyclic time slice with the access right of one of the functions, in such a way that each function is executed in the course of at least one time slice, at the start of each new time slice, confirming that the processor has terminated the execution of the previous function, and transmitting an error signal to the processor if the execution of the previous function has not terminated, updating a current access right corresponding to the access right associated with the new time slice, and activating the tasks of the corresponding function, and during each access by the processor to an addressable partition, reading the access right associated with the accessed partition, comparing this access right with the access right associated with the current time slice, and transmitting an error signal to the processor in the case in which the comparison reveals an inconsistency.