초록 ▼

A parallel digital matched filter is constructed which performs numerous simultaneous correlations of a received spread spectrum signal against various replica offsets of its spreading sequence. This allows for the rapid acquisition of the received signal code phase, and subsequent handoff to tracki

A parallel digital matched filter is constructed which performs numerous simultaneous correlations of a received spread spectrum signal against various replica offsets of its spreading sequence. This allows for the rapid acquisition of the received signal code phase, and subsequent handoff to tracking for a multi-channel receiver. A novel matched filter computational architecture is utilized, in which common digital arithmetic elements are used for both acquisition and tracking purposes. As each channel is sequentially acquired by the parallel matched filter, a subset of the arithmetic elements are then dedicated to the subsequent tracking of that channel. This process is repeated, with the remaining available arithmetic elements accelerating the acquisition of the next channel, and so on, until all resources are allocated as tracking channels. Additionally, multiple data inputs and delay lines are present in this architecture, and are available for processing at each arithmetic element. In this way, multiple signal bands and user channels may be integrated within a common receiver framework.

대표청구항 ▼

1. A parallel digital matched filter constructed to perform a plurality of simultaneous correlations of a received spread spectrum signal against various replica offsets of its spreading sequence and allows for the rapid acquisition of the received signal code phase, and subsequent handoff to tracki

1. A parallel digital matched filter constructed to perform a plurality of simultaneous correlations of a received spread spectrum signal against various replica offsets of its spreading sequence and allows for the rapid acquisition of the received signal code phase, and subsequent handoff to tracking for a multi-channel receiver, comprising matched filter computational architecture in which common digital arithmetic elements are used for both acquisition and tracking purposes, wherein, as each channel is sequentially acquired by said parallel matched filter, a subset of the arithmetic elements are then dedicated to the subsequent tracking of that channel, and this process is repeated, with the remaining available arithmetic elements accelerating the acquisition of the next channel, and so on, until all resources are allocated as tracking channels, and wherein multiple data inputs and delay lines are present, and are available for processing at each arithmetic element, whereby multiple signal bands and user channels are integrated within a common receiver framework, and one or more utilization devices are coupled to said matched filter.