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Method for forming cavities in a semiconductor substrate by implanting atoms 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/425
출원번호 US-0600162 (2000-09-18)
우선권정보 FR-0001172 (1998-02-02)
국제출원번호 PCT/FR99/00197 (1999-02-01)
§371/§102 date 20000918 (20000918)
국제공개번호 WO99/39378 (1999-08-05)
발명자 / 주소
  • Andre-Jacques Auberton-Herve FR
출원인 / 주소
  • S.O.I. Tec Silicon on Insulator Technologies FR
대리인 / 주소
    Jacobson Holman, PLLC
인용정보 피인용 횟수 : 44  인용 특허 : 7

초록 ▼

The invention concerns a method for treating substrates, in particular semiconductors, by implanting atoms so as to produce a substrate of cavities at a controlled depth, characterized in that it comprises steps which consists in: implanting atoms in the substrate at a first depth, to obtain a first

대표청구항 ▼

1. A process for treating substrates, especially semiconductor substrates, by atom implantation for the purpose of creating cavities in a substrate at a controlled depth, comprising the steps of:implanting atoms into the substrate at a first depth, in order to obtain a first atom concentration at sa

이 특허에 인용된 특허 (7)

  1. Gardner Mark I. ; Wristers Derick J. ; Dawson Robert ; Fulford ; Jr. H. Jim ; Hause Frederick N. ; Michael Mark W. ; Moore Bradley T., Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device.
    상세보기
  2. Aspar Bernard,FRX ; Biasse Beatrice,FRX ; Bruel Michel,FRX, Method of obtaining a thin film of semiconductor material.
    상세보기
  3. Lim Desmond R. (Singapore SGX) Rafferty Conor Stefan (Summit NJ), Process for reducing transient diffusion of dopant atoms.
    상세보기
  4. Hanson David R. ; Huston ; III Hance H. ; Srikrishnan Kris V., Process for restoring rejected wafers in line for reuse as new.
    상세보기
  5. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
    상세보기
  6. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
    상세보기
  7. Dearnaley Geoffrey, Suppression of transient enhanced diffusion in ion implanted silicon.
    상세보기

이 특허를 인용한 특허 (44)

  1. Pinnington, Thomas Henry; Zahler, James M.; Park, Young-Bae; Ladous, Corinne; Olson, Sean, Bonded intermediate substrate and method of making same.
    상세보기
  2. Pinnington, Thomas Henry; Zahler, James M.; Park, Young-Bae; Tsai, Charles; Ladous, Corinne; Atwater, Jr., Harry A.; Olson, Sean, Bonded intermediate substrate and method of making same.
    상세보기
  3. Braley, Carole; Mazen, Frédéric, Detachment of a self-supporting layer of silicon <100>.
    상세보기
  4. Gonzalez, Fernando; Mouli, Chandra, Device having conductive material disposed in a cavity formed in an isolation oxide disposed in a trench.
    상세보기
  5. Joly, Jean-Pierre; Ulmer, Laurent; Parat, Guy, Integrated circuit on high performance chip.
    상세보기
  6. Sadaka, Mariam; Radu, Ionut, Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods.
    상세보기
  7. Henley, Francois J.; Lamm, Albert; Adibi, Babak, Method and structure for thick layer transfer using a linear accelerator.
    상세보기
  8. Roberds, Brian; Colinge, Cindy; Doyle, Brian, Method for bonding and debonding films using a high-temperature polymer.
    상세보기
  9. Fournel, Franck; Moriceau, Hubert; Lagahe, Christelle, Method for making a stressed structure designed to be dissociated.
    상세보기
  10. Deguet, Chrystel; Clavelier, Laurent, Method for making a thin-film element.
    상세보기
  11. Tauzin, Aurélie; Dechamp, Jérôme; Mazen, Frédéric; Madeira, Florence, Method for preparing thin GaN layers by implantation and recycling of a starting substrate.
    상세보기
  12. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle; Bourdelle, Konstantin; Tauzin, Aurélie; Fournel, Franck, Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation.
    상세보기
  13. Barge,Thierry; Auberton Herve,Andr챕; Aga,Hiroji; Tate,Naoto, Method for treating substrates for microelectronics and substrates obtained according to said method.
    상세보기
  14. Aga,Hiroji; Mitani,Kiyoshi, Method of fabricating SOI wafer.
    상세보기
  15. Brüderl, Georg; Eichler, Christoph; Strauss, Uwe, Method of fabricating a quasi-substrate wafer and semiconductor body fabricated using such a quasi-substrate wafer.
    상세보기
  16. Ghyselen, Bruno; Letertre, Fabrice, Method of fabricating substrates, in particular for optics, electronics or optoelectronics.
    상세보기
  17. Maleville,Christophe, Method of increasing the area of a useful layer of material transferred onto a support.
    상세보기
  18. Maleville,Christophe, Method of increasing the area of a useful layer of material transferred onto a support.
    상세보기
  19. Maleville,Christophe, Method of increasing the area of a useful layer of material transferred onto a support.
    상세보기
  20. Gonzalez, Fernando; Mouli, Chandra, Method of manufacturing devices having vertical junction edge.
    상세보기
  21. Deguet, Chrystel; Clavelier, Laurent; Dechamp, Jerome, Method of transferring a thin film onto a support.
    상세보기
  22. Fournel, Franck, Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer.
    상세보기
  23. Atwater, Jr.,Harry A.; Zahler,James M., Method of using a germanium layer transfer to Si for photovoltaic applications and heterostructure made thereby.
    상세보기
  24. Atwater, Jr.,Harry A.; Zahler,James M., Method of using a germanium layer transfer to Si for photovoltaic applications and heterostructure made thereby.
    상세보기
  25. Ries, Michael J.; Libbert, Jeffrey Louis; Lottes, Charles R., Methods for preparing layered semiconductor structures.
    상세보기
  26. Sadaka, Mariam; Radu, Ionut, Methods of transferring layers of material in 3D integration processes and related structures and devices.
    상세보기
  27. Atwater, Jr., Harry A.; Zahler, James; Morral, Anna Fontcuberta i; Olson, Sean, Multi-junction solar cells and methods of making same using layer transfer and bonding techniques.
    상세보기
  28. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film comprising an inclusion creation step.
    상세보기
  29. Barge,Thierry; Auberton Herve,Andr챕; Aga,Hiroji; Tate,Naoto, Process for treating substrates for the microelectronics industry, and substrates obtained by this process.
    상세보기
  30. Ramamurthy, Sundar; Hegedus, Andreas G.; Thakur, Randhir, Processing multilayer semiconductors with multiple heat sources.
    상세보기
  31. Sorabji, Khurshed; Ranish, Joseph Michael; Aderhold, Wolfgang; Hunter, Aaron Muir; Lerner, Alexander N., Rapid thermal processing chamber with shower head.
    상세보기
  32. Gadkaree,Kishor Purushottam, Semiconductor on glass insulator made using improved ion implantation process.
    상세보기
  33. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
    상세보기
  34. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
    상세보기
  35. Cherekdjian, Sarko, Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process.
    상세보기
  36. Cherekdjian, Sarko, Semiconductor structure made using improved simultaneous multiple ion implantation process.
    상세보기
  37. Ogura, Atsushi, Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods.
    상세보기
  38. Moriceau, Hubert; Aspar, Bernard; Margail, Jacques, Stacked structure and production method thereof.
    상세보기
  39. Ramachandran,Balasubramanian; Ranish,Joseph Michael; Jallepally,Ravi; Ramamurthy,Sundar; Achutharaman,Raman; Haas,Brian; Hunter,Aaron, Tailored temperature uniformity.
    상세보기
  40. Sorabji, Khurshed; Lerner, Alexander; Ranish, Joseph; Hunter, Aaron; Adams, Bruce; Behdjat, Mehran; Ramanujam, Rajesh, Temperature measurement and control of wafer support in thermal processing chamber.
    상세보기
  41. Tauzin,Aur��lie, Thin film splitting method.
    상세보기
  42. Gonzalez,Fernando; Mouli,Chandra, Transistor having vertical junction edge and method of manufacturing the same.
    상세보기
  43. Atwater, Jr.,Harry A.; Zahler,James M.; Morral,Anna Fontcubera I, Wafer bonded epitaxial templates for silicon heterostructures.
    상세보기
  44. Atwater, Jr.,Harry A.; Zahler,James M.; Morral,Anna Fontcuberta i, Wafer bonded virtual substrate and method for forming the same.
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