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Multi-function chamber for a substrate processing system

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • F27D-003/06
출원번호 US-0732159 (2000-12-07)
발명자 / 주소
  • John M. White
  • Wendell T. Blonigan
  • Michael W. Richter
출원인 / 주소
  • Applied Komatsu Technology, Inc. JP
대리인 / 주소
    Moser, Patterson & Sheridan LLP
인용정보 피인용 횟수 : 37  인용 특허 : 38

초록

A load lock chamber includes a chamber body having an aperture to allow a substrate to be transferred into or out of the chamber. The load lock chamber is configurable in several configurations, including a base configuration for providing a transition between two different pressures, a heating conf

대표청구항

1. A method of processing a substrate in a processing chamber, the method comprising:decreasing the volume of the chamber from a first processing volume to a second processing volume; supporting the substrate on a substrate support mechanism within the chamber; changing the pressure in the chamber f

이 특허에 인용된 특허 (38)

  1. White John M. (Hayward CA) Berkstresser David E. (Los Gatos CA) Petersen Carl T. (Fremont CA), Alignment of a shadow frame and large flat substrates on a heated support.
  2. White John M. (2811 Colony View Pl. Hayward CA 94541) Berkstresser David E. (19311 Bear Creek Rd. Los Gatos CA 95030) Petersen Carl T. (1185 Gilbert Ct. Fremont CA 94536), Alignment of a shadow frame and large flat substrates on a support.
  3. Prentakis Antonios E. (Cambridge MA), Apparatus and method for loading and unloading wafers.
  4. Hirasawa Shigeki (Ibaraki) Torii Takuji (Ushiku) Watanabe Tomoji (Ibaraki) Komatsu Toshihiro (Ibaraki) Honma Kazuo (Ibaraki) Sakai Akihiko (Ibaraki) Takagaki Tetsuya (Tokorozawa) Uchino Toshiyuki (To, Apparatus and method for performing heat treatment on semiconductor wafers.
  5. Kaltenbrunner Guenter,DEX ; Nenyei Zsolt,DEX ; Sommer Helmut,DEX, Apparatus and method for rapid thermal processing.
  6. Sugimoto Kenji (Kyoto JPX), Apparatus for treating the surfaces of wafers.
  7. MacLeish Joseph H. ; Mailho Robert D., CVD reactor having heated process chamber within isolation chamber.
  8. Van Mastrigt Max (San Jose CA), Chemical vapor deposition apparatus.
  9. Chizinsky George (143 West St. Beverly Farms MA 01915), Heated plate rapid thermal processor.
  10. Chizinsky George (143 West St. Beverly Farms MA 01915), Heated plate rapid thermal processor.
  11. Mishina Haruo,JPX ; Imaisumi Kiyoshi,JPX ; Yamama Shinya,JPX, Heating furnace.
  12. Lee Yong Jin ; Moslehi Mehrdad M. ; Kamali Jalil ; Belikov Sergey, High-performance energy transfer system and method for thermal processing applications.
  13. Coleman John H. (Locust Valley NY), Method of forming semiconducting materials and barriers using a dual enclosure apparatus.
  14. Coleman John H. (Locust Valley NY), Method of forming semiconducting materials and barriers using a multiple chamber arrangement.
  15. Turner Norman L. (Mountain View CA) White John MacNeill (Los Gatos CA) Berkstresser David (Los Gatos CA), Method of heating and cooling large area glass substrates.
  16. Turner Norman L. (Mountain View CA) White John M. (Los Gatos CA) Berkstresser David (Los Gatos CA), Method of heating and cooling large area substrates and apparatus therefor.
  17. Yamabe Kikuo (Yokohama JPX) Okumura Katsuya (Yokohama JPX), Method of thermally processing semiconductor wafers and an apparatus therefor.
  18. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  19. Namiki Minoru (Fuchu JPX) Takahashi Nobuyuki (Fuchu JPX), Multi-chamber integrated process system.
  20. Ozawa Masahito (Yamanashi JPX) Mizukami Masami (Yamanashi JPX) Kanazashi Masanobu (Kofu JPX) Takasoe Toshihiko (Yamanashi JPX) Narushima Masaki (Yamanashi JPX) Kubodera Masao (Yamanashi JPX), Multi-chamber system provided with carrier units.
  21. Mahawili Imad (Sunnyvale CA), Multi-zone planar heater assembly and method of operation.
  22. Muka Richard S. (Topsfield MA), Passive gas substrate thermal conditioning apparatus and method.
  23. Yano Kensaku (Kanagawa JPX) Furukawa Akihiko (Tokyo JPX) Miyagawa Ryohei (Kanagawa JPX) Iida Yoshinori (Tokyo JPX), Photo chemical reaction apparatus.
  24. Yamamoto Shigeyuki (Nara JPX) Yamada Yuichiro (Suita JPX) Hohchin Ryuzoh (Hirakata JPX) Tanabe Hiroshi (Yamatotakada JPX) Okumura Tomohiro (Hirakata JPX), Plasma CVD system.
  25. Schmitt Jacques (La Ville Du Bois FRX), Process and means for producing films for use in electronics and/or optoelectronics using plasma.
  26. Lee Chunghsin (Lynnfield MA), Rapid thermal furnace for semiconductor processing.
  27. Ozias Albert E. (Aumsville OR), Reaction chambers for CVD systems.
  28. Grunes Howard (Santa Cruz CA) Tepman Avi (Cupertino CA) Lowrance Robert (Los Gatos CA), Robot assembly.
  29. Murakami Seishi (Koufu JPX), Semiconductor processing apparatus.
  30. Tietz James V. ; Bierman Benjamin ; Ballance David S., Semiconductor wafer support with graded thermal mass.
  31. Mayur Abhilash ; Stern Lewis A. ; White Anthony, Substrate support for a thermal processing chamber.
  32. Moslehi Mehrdad M. (Palo Alto CA) Saraswat Krishna C. (Santa Clara County CA), Thermal/microwave remote plasma multiprocessing reactor and method of use.
  33. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  34. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  35. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  36. Kato Susumu (Isawa-Cho JPX) Yamaguchi Hirofumi (Sudama-Cho JPX), Vacuum process apparaus.
  37. Turner Norman L. (Mountain View CA) White John M. (Hayward CA), Vacuum processing apparatus having improved throughput.
  38. Dorenbos Frederick William (El Cerrito CA), Workpiece handling system for vacuum processing.

이 특허를 인용한 특허 (37)

  1. Brunner, Matthias; Kurita, Shinichi; Schmid, Ralf; Abboud, Fayez (Frank) E.; Johnston, Benjamin; Bocian, Paul; Beer, Emanuel, Configurable prober for TFT LCD array test.
  2. Brunner,Matthias; Kurita,Shinichi; Schmid,Ralf; Abboud,Fayez E.; Johnston,Benjamin; Bocian,Paul; Beer,Emanuel, Configurable prober for TFT LCD array test.
  3. Brunner,Matthias; Kurita,Shinichi; Schmid,Ralf; Abboud,Fayez (Frank) E.; Johnston,Benjamin; Bocian,Paul; Beer,Emanuel, Configurable prober for TFT LCD array testing.
  4. Lee,Jae Chull; Berkstresser,David, Curved slit valve door with flexible coupling.
  5. Lee, Jae-Chull; Kurita, Shinichi; White, John M.; Anwar, Suhail, Decoupled chamber body.
  6. Kurita, Shinichi; Blonigan, Wendell T., Double dual slot load lock chamber.
  7. Brunner, Matthias, Drive apparatus with improved testing properties.
  8. Kurita, Shinichi; Blonigan, Wendell T.; Hosokawa, Akihiro, Dual substrate loadlock process equipment.
  9. Narayanan, Sundar, Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall.
  10. Abboud, Fayez E.; Krishnaswami, Sriram; Johnston, Benjamin M.; Nguyen, Hung T.; Brunner, Matthias; Schmid, Ralf; White, John M.; Kurita, Shinichi; Hunter, James C., In-line electron beam test system.
  11. Abboud, Fayez E.; Krishnaswami, Sriram; Johnston, Benjamin M.; Nguyen, Hung T.; Brunner, Matthias; Schmid, Ralf; White, John M.; Kurita, Shinichi; Hunter, James C., In-line electron beam test system.
  12. Kurita,Shinichi; Beer,Emanuel; Nguyen,Hung T.; Johnston,Benjamin; Abboud,Fayez E., Integrated substrate transfer module.
  13. Kurita, Shinichi; Blonigan, Wendell T.; Tanase, Yoshiaki, Large area substrate transferring method for aligning with horizontal actuation of lever arm.
  14. Brunner,Matthias; Kurita,Shinichi; Blonigan,Wendell T.; Kehrberg,Edgar, Large substrate test system.
  15. Iwabuchi, Katsuhiko, Load lock apparatus, processing system and substrate processing method.
  16. Iwabuchi, Katsuhiko, Load lock apparatus, processing system and substrate processing method.
  17. Kurita,Shinichi; Blonigan,Wendell T.; Tanase,Yoshiaki, Load lock chamber for large area substrate processing system.
  18. Kurita,Shinichi; Blonigan,Wendell T., Load lock chamber having two dual slot regions.
  19. Lee, Jae-Chull; Anwar, Suhail; Kurita, Shinichi, Load lock chamber with decoupled slit valve door seal compartment.
  20. Morad, Ratson, Method and apparatus for inline deposition of materials on a non-planar surface.
  21. Wang, Hougong; Xu, Zheng; Ngan, Kenny King-Tai, Method and apparatus for processing substrates in a system having high and low pressure areas.
  22. Kurita,Shinichi; Blonigan,Wendell T., Method for transferring substrates in a load lock chamber.
  23. Bachrach, Robert Z., Method of achieving high productivity fault tolerant photovoltaic factory with batch array transfer robots.
  24. Bachrach,Robert Z., Method of achieving high productivity fault tolerant photovoltaic factory with batch array transfer robots.
  25. Morad, Ratson, Method of and apparatus for inline deposition of materials on a non-planar surface.
  26. Morad, Ratson, Method of depositing materials on a non-planar surface.
  27. Morad, Ratson, Method of depositing materials on a non-planar surface.
  28. Leung, Billy C.; Berkstresser, David E.; Kurita, Shinichi, Methods and apparatus for providing a floating seal for chamber doors.
  29. Leung, Billy C.; Berkstresser, David E.; Kurita, Shinichi, Methods and apparatus for providing a floating seal having an isolated sealing surface for chamber doors.
  30. White, John M.; Kurita, Shinichi; Sterling, William N.; Tanase, Yoshiaki, Methods and apparatus for sealing a chamber.
  31. Johnston, Benjamin M.; Krishnaswami, Sriram; Nguyen, Hung T.; Brunner, Matthias; Liu, Yong, Mini-prober for TFT-LCD testing.
  32. Kurita, Shinichi; Anwar, Suhail; Lee, Jae-Chull, Multiple slot load lock chamber and method of operation.
  33. Kapre, Ravindra M.; Lakshminarayanan, Sethuraman, Polycrystalline silicon activation RTA.
  34. Krishnaswami, Sriram; Brunner, Matthias; Beaton, William; Liu, Yong; Johnston, Benjamin M.; Nguyen, Hung T.; Ledl, Ludwig; Schmid, Ralf, Prober for electronic device testing on large area substrates.
  35. Buller, Benyamin; Gronet, Chris; Truman, Kelly; Brezoczky, Thomas, Support system for solar energy generator panels.
  36. Kim, Sam Hyungsam; Lee, Jae-Chull; Sterling, William N.; Brown, Paul, Valve door with ball coupling.
  37. Li, Chunlong; Li, Junfeng, Wafer transfer apparatus and wafer transfer method.
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