초록 ▼

A double indirect method of accessing a block of data in a register file is used to allow efficient implementations without the use of specialized vector processing hardware. In addition, the automatic modification of the register addressing is not tied to a single vector instruction nor to repeat o

A double indirect method of accessing a block of data in a register file is used to allow efficient implementations without the use of specialized vector processing hardware. In addition, the automatic modification of the register addressing is not tied to a single vector instruction nor to repeat or loop instructions. Rather, the technique, termed register file indexing (RFI) allows full programmer flexibilty in control of the block data operational facility and provides the capability to mix non-RFI instructions with RFI instructions. The block-data operation facility is embedded in the iVLIW ManArray architecture allowing its generalized use across the instruction set architecture without specialized vector instructions or being limited in use only with repeat or loop instructions. The use of RFI in a processor containing multiple heterogeneous execution units which operate in parallel, such as VLIW or iVLIW processors, allows for efficient pipelining of algorithms across multiple execution units while minimizing the number of VLIW instructions required.

대표청구항 ▼

1. A data processor with register file indexing comprising:an instruction sequencer and N execution units capable of executing up to N instructions in parallel; a plurality of register files with registers which contain data operands read and written by the N execution units, each register file havi

1. A data processor with register file indexing comprising:an instruction sequencer and N execution units capable of executing up to N instructions in parallel; a plurality of register files with registers which contain data operands read and written by the N execution units, each register file having read ports to and write ports from the N execution units; and read and write ports associated with each execution unit which have associated control circuitry and register file index (RFI) registers which allow registers to be addressed using both a first addressing approach in which fields of an instruction word made available to a particular execution unit directly specify addresses, and a second indirect addressing approach in which the contents of register file index registers are utilized in specifying the addresses.