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Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/30
  • H01L-021/46
출원번호 US-0906865 (2001-07-16)
발명자 / 주소
  • Francois J. Henley
  • Sien G. Kang
  • Igor J. Malik
출원인 / 주소
  • Silicon Genesis Corporation
대리인 / 주소
    Wagner Murabito & Hao LLP
인용정보 피인용 횟수 : 90  인용 특허 : 4

초록

A method for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer. For example, a plurality of donor wafers with different silicon layer thicknesses along with a plurality of handle wafers with different oxide layer thicknesses are fabricated. Subsequ

대표청구항

1. A method for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer, said method comprising the steps of:receiving a desired layer thickness; selecting a donor wafer based upon said desired layer thickness from a plurality of donor wafers having diff

이 특허에 인용된 특허 (4)

  1. Henley Francois J. ; Cheung Nathan, Clustertool system software using plasma immersion ion implantation.
  2. Cohen Guy Moshe ; Sadana Devendra Kumar, Method for patterning a buried oxide thickness for a separation by implanted oxygen (simox) process.
  3. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
  4. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.

이 특허를 인용한 특허 (90)

  1. Adibi, Babak; Murrer, Edward S., Application specific implant system and method for use in solar cell fabrications.
  2. Akatsu,Takeshi; Daval,Nicolas; Nguyen,Nguyet Phuong; Rayssac,Olivier; Bourdelle,Konstantin, Atomic implantation and thermal treatment of a semiconductor layer.
  3. Brask, Justin K.; Shaheen, Mohamed A.; Zhang, Ruitao, Chemical thinning of epitaxial silicon layer over buried oxide.
  4. Brask,Justin K.; Shaheen,Mohamed A.; Zhang,Ruitao, Chemical thinning of silicon body of an SOI substrate.
  5. Currie,Matthew T., Control of strain in device layers by prevention of relaxation.
  6. Currie,Matthew T., Control of strain in device layers by selective relaxation.
  7. Maleville, Christophe, Edge removal of silicon-on-insulator transfer wafer.
  8. Wu,Kenneth C.; Fitzgerald,Eugene A.; Taraschi,Gianni; Borenstein,Jeffrey T., Etch stop layer system.
  9. Stuber, Michael A., Forming semiconductor structure with device layers and TRL.
  10. Stuber, Michael A., Forming semiconductor structure with device layers and TRL.
  11. Prabhakar, Vinay; Adibi, Babak, Grid for plasma ion implant.
  12. Prabhakar, Vinay; Adibi, Babak, Grid for plasma ion implant.
  13. Currie, Matthew T., Hybrid fin field-effect transistor structures and related methods.
  14. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.
  15. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.
  16. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.
  17. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi, Light emitting device, semiconductor device, and method of fabricating the devices.
  18. Yamazaki,Shunpei; Takayama,Toru; Maruyama,Junya; Mizukami,Mayumi, Light emitting device, semiconductor device, and method of fabricating the devices.
  19. Yen, Wei-Kuo; Hsu, Yi-Chin; Chen, Cheng-Che; Chen, Chiu-Ju, Method and system for efficiently coordinating orders with product materials progressing through a manufacturing flow.
  20. Adibi, Babak; Chun, Moon, Method for ion implant using grid assembly.
  21. Henley, Francois J., Method of cleaving a thin sapphire layer from a bulk material by implanting a plurality of particles and performing a controlled cleaving process.
  22. Tong,Qin Yi; Fountain, Jr.,Gaius Gillman, Method of detachable direct bonding at low temperatures.
  23. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi, Method of fabricating a semiconductor device having a film in contact with a debonded layer.
  24. Cheng,Zhiyuan; Fitzgerald,Eugene A.; Antoniadis,Dimitri A., Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers.
  25. Takayama,Toru; Maruyama,Junya; Yamazaki,Shunpei, Method of peeling off and method of manufacturing semiconductor device.
  26. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.
  27. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.
  28. Fitzgerald,Eugene; Currie,Matthew, Methods for fabricating strained layers on semiconductor substrates.
  29. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming III-V semiconductor device structures.
  30. Daval,Nicolas; Akatsu,Takeshi; Nguyen,Nguyet Phuong; Rayssac,Olivier, Methods for forming a semiconductor structure.
  31. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain.
  32. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes.
  33. Brindle, Chris N.; Stuber, Michael A.; Molin, Stuart B., Methods for the formation of a trap rich layer.
  34. Brindle, Chris; Stuber, Michael A.; Molin, Stuart B., Methods for the formation of a trap rich layer.
  35. Daval,Nicolas; Akatsu,Takeshi; Nguyen,Nguyet Phuong, Methods for thermally treating a semiconductor layer.
  36. Currie,Matthew T., Methods of forming hybrid fin field-effect transistor structures.
  37. Wang, Wei-E; Rodder, Mark; Obradovic, Borna, Methods of forming nanosheets on lattice mismatched substrates.
  38. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods of forming strained-semiconductor-on-insulator device structures.
  39. Lochtefeld,Anthony J.; Langdo,Thomas A.; Hammond,Richard; Currie,Matthew T.; Braithwaite,Glyn; Fitzgerald,Eugene A., Methods of forming strained-semiconductor-on-insulator finFET device structures.
  40. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  41. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  42. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  43. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.
  44. Takayama,Toru; Maruyama,Junya; Yamazaki,Shunpei, Peeling method and method of manufacturing semiconductor device.
  45. Yamazaki, Shunpei; Suzuki, Kunihiko, Peeling method and peeling apparatus.
  46. Yasumoto, Seiji; Sato, Masataka; Eguchi, Shingo; Suzuki, Kunihiko, Peeling method, semiconductor device, and peeling apparatus.
  47. Adibi, Babak; Chun, Moon, Plasma grid implant system for use in solar cell fabrications.
  48. Cheng, Zhi-Yuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A.; Hoyt, Judy L., Process for producing semiconductor article using graded epitaxial growth.
  49. Molin, Stuart B.; Stuber, Michael A.; Drucker, Mark, Redistribution layer contacting first wafer through second wafer.
  50. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  51. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  52. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  53. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  54. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  55. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  56. Yamazaki, Shunpei; Takayama, Toru; Maruyama, Junya; Ohno, Yumiko, Semiconductor device and manufacturing method thereof.
  57. Yamazaki,Shunpei; Takayama,Toru, Semiconductor device and manufacturing method thereof.
  58. Yamazaki,Shunpei; Takayama,Toru; Maruyama,Junya; Ohno,Yumiko, Semiconductor device and manufacturing method thereof.
  59. Maruyama, Junya; Takayama, Toru; Goto, Yuugo, Semiconductor device and method of manufacturing the same.
  60. Maruyama, Junya; Takayama, Toru; Goto, Yuugo, Semiconductor device and method of manufacturing the same.
  61. Maruyama, Junya; Takayama, Toru; Goto, Yuugo, Semiconductor device and method of manufacturing the same.
  62. Maruyama, Junya; Takayama, Toru; Goto, Yuugo, Semiconductor device and method of manufacturing the same.
  63. Maruyama,Junya; Takayama,Toru; Goto,Yuugo, Semiconductor device and method of manufacturing the same.
  64. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  65. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  66. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  67. Takayama, Toru; Maruyama, Junya; Mizukami, Mayumi; Yamazaki, Shunpei, Semiconductor device and peeling off method and method of manufacturing semiconductor device.
  68. Yamazaki, Shunpei; Takayama, Toru, Semiconductor device including a flexible support.
  69. Cheng, Zhiyuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A., Semiconductor device structure.
  70. Sinha, Nishant; Sandhu, Gurtej S.; Smythe, John, Semiconductor material manufacture.
  71. Stuber, Michael A.; Imthurn, George, Semiconductor structure with TRL and handle wafer cavities.
  72. Adibi, Babak; Murrer, Edward S., Solar cell fabrication with faceting and ion implantation.
  73. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained germanium-on-insulator device structures.
  74. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  75. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  76. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures with elevated source/drain regions.
  77. Langdo,Thomas A.; Currie,Matthew T.; Braithwaite,Glyn; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator finFET device structures.
  78. Pederson, Terry; Hieslmair, Henry; Chun, Moon; Prabhakar, Vinay; Adibi, Babak; Bluck, Terry, Substrate processing system and method.
  79. Pederson, Terry; Hieslmair, Henry; Chun, Moon; Prabhakar, Vinay; Adibi, Babak; Bluck, Terry, Substrate processing system and method.
  80. Daval,Nicolas; Akatsu,Takeshi; Nguyen,Nguyet Phuong, Thermal treatment of a semiconductor layer.
  81. Brindle, Chris; Stuber, Michael A.; Molin, Stuart B., Trap rich layer for semiconductor devices.
  82. Brindle, Christopher N.; Stuber, Michael A.; Molin, Stuart B., Trap rich layer for semiconductor devices.
  83. Arriagada, Anton; Stuber, Michael A.; Molin, Stuart B., Trap rich layer formation techniques for semiconductor devices.
  84. Arriagada, Anton; Stuber, Michael A.; Molin, Stuart B., Trap rich layer formation techniques for semiconductor devices.
  85. Arriagada, Anton; Stuber, Michael A.; Molin, Stuart B., Trap rich layer formation techniques for semiconductor devices.
  86. Arriagada, Anton; Brindle, Chris; Stuber, Michael A., Trap rich layer with through-silicon-vias in semiconductor devices.
  87. Arriagada, Anton; Brindle, Chris; Stuber, Michael A., Trap rich layer with through-silicon-vias in semiconductor devices.
  88. Arriagada, Anton; Brindle, Chris; Stuber, Michael A., Trap rich layer with through-silicon-vias in semiconductor devices.
  89. Takayama, Toru; Maruyama, Junya; Goto, Yuugo; Kuwabara, Hideaki; Yamazaki, Shunpei, Vehicle, display device and manufacturing method for a semiconductor device.
  90. Takayama,Toru; Maruyama,Junya; Goto,Yuugo; Kuwabara,Hideaki; Yamazaki,Shunpei, Vehicle, display device and manufacturing method for a semiconductor device.
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