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Smoothing method for cleaved films made using thermal treatment 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/78
  • H01L-021/301
  • H01L-021/36
  • H01L-021/479
출원번호 US-0808661 (2001-03-14)
발명자 / 주소
  • Igor J. Malik
  • Sien G. Kang
출원인 / 주소
  • Silicon Genesis Corporation
대리인 / 주소
    Townsend and Townsend and Crew LLP
인용정보 피인용 횟수 : 33  인용 특허 : 36

초록

In a specific embodiment, the present invention provides a novel process for smoothing a surface of a separated film. The present process is for the preparation of thin semiconductor material films. The process includes a step of implanting by ion bombardment of the face of the wafer by means of ion

대표청구항

1. Process for the preparation of thin semiconductor material films, wherein the process comprises subjecting a semiconductor material wafer having a planar face and whose plane, is substantially parallel to a principal crystallographic plane, the process comprising:implanting by ion bombardment of

이 특허에 인용된 특허 (36)

  1. Matsushita Takeshi,JPX ; Morita Etsuo,JPX ; Nakajima Tsuneo,JPX ; Hasegawa Hiroyuki,JPX ; Shingyouji Takayuki,JPX, A SOI substrate fabricating method.
  2. Walsh Robert J. (Ballwin MO), Apparatus for processing semiconductor wafers.
  3. Henley Francois J. ; Cheung Nathan W., Controlled cleavage process and resulting device using beta annealing.
  4. Gonzalez Fernando ; Thakur Randhir P.S., In situ rapid thermal etch and rapid thermal oxidation.
  5. Hirayama Hideo (Yokohama JPX) Ibaraki Nobuki (Kanagawa-ken JPX) Hidaka Koji (Yokohama JPX) Mizouchi Kiyotsugu (Yokohama JPX) Kobayashi Michiya (Yokohama JPX) Ishigami Takashi (Yokohama JPX) Sakai Ryo, Light-shielding film, useable in an LCD, in which fine particles of a metal or semi-metal are dispersed in and throughou.
  6. Sato Nobuhiko,JPX, Method and apparatus for heat-treating an SOI substrate and method of preparing an SOI substrate by using the same.
  7. Ohta Yutaka (Gunma JPX) Nakano Masatake (Gunma JPX) Katayama Masatake (Gunma JPX) Abe Takao (Gunma JPX), Method and apparatus for production of extremely thin SOI film substrate.
  8. Rolfson J. Brett ; Lowrey Tyler A. ; Gonzalez Fernando ; Barbour W. Richard, Method for CMOS well drive in a non-inert ambient.
  9. Cathey David A. (Boise ID), Method for etching high aspect ratio features.
  10. Jastrzebski Lubomir L. (Plainsboro NJ) Ipri Alfred C. (Princeton NJ) Kokkas Achilles G. (Plainsboro NJ), Method for fabricating a self-aligned vertical IGFET.
  11. Zhong Lei,JPX ; Shimoi Norihiro,JPX ; Kirino Yoshio,JPX, Method for making a slant-surface silicon wafer having a reconstructed atomic-level stepped surface structure.
  12. Tayanaka Hiroshi,JPX, Method for making thin film semiconductor.
  13. Bruel Michel (Veurey FRX), Method for placing semiconductive plates on a support.
  14. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Method for producing semiconductor substrate.
  15. Habuka Hitoshi,JPX ; Otsuka Toru,JPX ; Katayama Masatake,JPX, Method for smoothing surface of silicon single crystal substrate.
  16. Goesele Ulrich M. ; Tong Q.-Y., Method for the transfer of thin layers of monocrystalline material to a desirable substrate.
  17. Horai Masataka (Saga JPX) Adachi Naoshi (Saga JPX) Nishikawa Hideshi (Saga JPX) Sano Masakazu (Saga JPX), Method of annealing a semiconductor wafer in a hydrogen atmosphere to desorb surface contaminants.
  18. MacLeish Joseph H. ; Sanganeria Mahesh K., Method of cleaning wafer substrates.
  19. Takizawa Ritsuo (Tokyo JPX), Method of making a semiconductor device having a process of hydrogen annealing.
  20. Li Jianming (Beijing CNX), Method of making silicon material with enhanced surface mobility by hydrogen ion implantation.
  21. Foresi James S. ; Agarwal Anu M. ; Black Marcie R. ; Koker Debra M. ; Kimerling Lionel C., Methods of forming polycrystalline semiconductor waveguides for optoelectronic integrated circuits, and devices formed t.
  22. Scudder Lance (Mountain View CA) Riley Norma (Pleasanton CA), Process for inhibiting slip and microcracking while forming epitaxial layer on semiconductor wafer.
  23. Pinker Ronald D. (Peekskill NY) Merchant Steven L. (Yorktown Heights NY) Arnold ; Emil (Chappaqua NY), Process for making thin film silicon-on-insulator wafers employing wafer bonding and wafer thinning.
  24. Menigaux Louis (Bures sur Yvett FRX) Bruno Adrien (Palaiseau FRX), Process for producing a structure integrating a cleaved optical guide with an optical fibre support for a guide-fibre op.
  25. Kato Takashi (Kawasaki JPX) Toyokura Nobuo (Kawasaki JPX), Process for producing dielectric layers for semiconductor devices.
  26. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX, Process for producing semiconductor article.
  27. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Process for producing semiconductor substrate by heating to flatten an unpolished surface.
  28. Bruel Michel,FRX, Process for the manufacture of thin films of semiconductor material.
  29. Bruel Michel (Veurey FRX), Process for the production of a relief structure on a semiconductor material support.
  30. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  31. Gonzalez Fernando ; Thakur Randhir P. S., Rapid thermal etch and rapid thermal oxidation.
  32. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Semiconductor substrate and method of manufacturing the same.
  33. Matsushita Takeshi,JPX ; Kusunoki Misao,JPX ; Tatsumi Takaaki,JPX, Semiconductor substrate and thin film semiconductor device, method of manufacturing the same, and anodizing apparatus.
  34. Malik Igor J. ; Kang Sien G., Smoothing method for cleaved films made using thermal treatment.
  35. Yoneda Kiyoshi (Hirakata JPX) Mameno Kazunobu (Kyoto JPX) Kawahara Keita (Nagaokakyo JPX) Inoue Yasunori (Osaka JPX), Surface smoothing method and method of forming SOI substrate using the surface smoothing method.
  36. Kang Sien G. ; Malik Igor J., Treatment method of cleaved film for the manufacture of substrates.

이 특허를 인용한 특허 (33)

  1. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  2. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  3. Blake, Julian G.; Murphy, Paul J., Cooled cleaving implant.
  4. Khemka, Vishnu; Zhu, Ronghua; Khan, Tahir Arif; Grote, Bernhard Heinrich, Integrated MOS power transistor with body extension region for poly field plate depletion assist.
  5. Khemka, Vishnu; Zhu, Ronghua; Khan, Tahir Arif; Grote, Bernhard Heinrich, Integrated MOS power transistor with poly field plate extension for depletion assist.
  6. McGregor, Joel Montgomery; Khemka, Vishnu, Integrated MOS power transistor with thin gate oxide and low gate charge.
  7. McGregor, Joel Montgomery; Khemka, Vishnu, Integrated MOS power transistor with thin gate oxide and low gate charge.
  8. Henley, Francois J., Layer transfer of films utilizing controlled propagation.
  9. Henley, Francois J., Layer transfer of films utilizing controlled shear region.
  10. Katou, Hiroaki, Manufacturing method of bonded SOI substrate and manufacturing method of semiconductor device.
  11. Henley,Francois J.; Kirk,Harry R., Manufacturing strained silicon substrates using a backing material.
  12. Henley, Francois J.; Sullivan, James Andrew; Kang, Sien Giok; Ong, Philip James; Kirk, Harry Robert; Jacy, David; Malik, Igor, Method and structure for fabricating bonded substrate structures using thermal processing to remove oxygen species.
  13. Henley, Francois J., Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process.
  14. Henley, Francois J., Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process.
  15. Henley, Francois J, Method and structure for fabricating solar cells using a layer transfer process.
  16. Henley, Francois J.; Ong, Philip James, Method and structure for fabricating solar cells using a layer transfer process.
  17. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.
  18. Henley, Francois J., Method and system for continuous large-area scanning implantation process.
  19. Henley, Francois J.; Kirk, Harry Robert; Sullivan, James Andrew, Method for manufacturing devices on a multi-layered substrate utilizing a stiffening backing substrate.
  20. Henley, Francois J., Method of cleaving a thin sapphire layer from a bulk material by implanting a plurality of particles and performing a controlled cleaving process.
  21. Tong,Qin Yi; Fountain, Jr.,Gaius Gillman, Method of detachable direct bonding at low temperatures.
  22. Mitani,Kiyoshi; Yokokawa,Isao, Method of fabricating SOI wafer.
  23. Blomiley, Eric R.; Ping, Er-Xuan, Methods of forming semiconductive materials having flattened surfaces; methods of forming isolation regions; and methods of forming elevated source/drain regions.
  24. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.
  25. Sinha, Nishant; Sandhu, Gurtej S.; Smythe, John, Semiconductor material manufacture.
  26. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  27. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  28. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  29. Henley, Francois J.; Kirk, Harry Robert; Sullivan, James Andrew, Substrate stiffness method and resulting devices for layer transfer process.
  30. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.
  31. Henley,Francois J., Thin handle substrate method and structure for fabricating devices using one or more films provided by a layer transfer process.
  32. Parvarandeh, Pirooz, Use of device assembly for a generalization of three-dimensional metal interconnect technologies.
  33. Parvarandeh, Pirooz, Use of device assembly for a generalization of three-dimensional metal interconnect technologies.
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