초록 ▼

An analog-to-digital converter includes a delta sigma modulator (103) adapted to produce a stream of pulses (104) the density of which represents the amplitude of an analog input signal (VIN) coupled to an input of the delta sigma modulator. A decimation filter (105) is coupled to filter the stream

An analog-to-digital converter includes a delta sigma modulator (103) adapted to produce a stream of pulses (104) the density of which represents the amplitude of an analog input signal (VIN) coupled to an input of the delta sigma modulator. A decimation filter (105) is coupled to filter the stream of pulses and produce a digital word (106) representing the amplitude of the analog input signal. A serial interface circuit (109) is coupled to serially receive the bits of the output word and serially shift the bits of the digital word to a data terminal (110). A timing generator (17) produces timing signals to control operation of the delta sigma modulator and the decimation filter and generates a conversion done signal (21) indicative of completion of conversion of the analog input signal (VIN) into the digital word. A control circuit (107) produces a data ready signal (32) on the data terminal (110) in response to the conversion done signal and causes the serial interface circuit to serially shift the bits of the digital word onto the data terminal in response to a digital control signal (SCLK).

대표청구항 ▼

1. An analog-to-digital converter comprising:(a) a delta sigma modulator adapted to produce a stream of pulses the density of which represents the amplitude of an analog input signal coupled to an input of the delta sigma modulator; (b) a decimation filter coupled to filter the stream of pulses and

1. An analog-to-digital converter comprising:(a) a delta sigma modulator adapted to produce a stream of pulses the density of which represents the amplitude of an analog input signal coupled to an input of the delta sigma modulator; (b) a decimation filter coupled to filter the stream of pulses and produce a digital word representing the amplitude of the analog input signal; (c) a serial interface circuit coupled to receive the bits of the digital word and serially shift the bits of the digital word to a single data terminal; (d) a timing generator operative in response to a clock signal to produce timing signals to control operation of the delta sigma modulator and the decimation filter, the timing generator also producing a conversion done signal indicative of completion of conversion of the analog input signal into the digital word; and (e) a control circuit operative in response to the conversion done signal to produce a data ready signal on the data terminal and also operative in response to a single digital control signal to cause the serial interface circuit to serially shift the bits of the digital word onto the data terminal, wherein two-wire communication with the analog-to-digital converter is accomplished by the single data terminal and the single digital control signal.