초록 ▼

A computer-implemented method automates the design of efficient binary instruction encodings of VLIW instruction formats. The method automatically finds compact instruction formats that can express and exploit the full parallelism specified in the underlying processor microarchitecture, subject to c

A computer-implemented method automates the design of efficient binary instruction encodings of VLIW instruction formats. The method automatically finds compact instruction formats that can express and exploit the full parallelism specified in the underlying processor microarchitecture, subject to constraints on alignment and decode hardware complexity. The method can be guided by statistics about the composition and frequency of program instructions, so that the instruction format design is customized to a particular set of applications or an application domain.

대표청구항 ▼

1. A method for-programmatic design of a VLIW processor instruction format from an input specification including specified processor operations, instruction level parallelism constraints among the specified operations, and a datapath representation of the processor, the method comprising:based on th

1. A method for-programmatic design of a VLIW processor instruction format from an input specification including specified processor operations, instruction level parallelism constraints among the specified operations, and a datapath representation of the processor, the method comprising:based on the specified processor operations, the instruction level parallelism constraints, and the datapath representation, programmatically constructing a bit allocation problem specification identifying instruction fields that are to be assigned to bit positions in the instruction format of the processor, bit width requirements of the instruction fields, and instruction field conflict constraints; and programmatically allocating bit positions in the processor to the instruction fields in the bit allocation problem specification.