초록 ▼

A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer

A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

대표청구항 ▼

1. A method of fabricating a semiconductor device, comprising the steps of:(a) depositing a first conductive film over a memory cell-forming region and a peripheral circuit region of a semiconductor substrate; (b) etching said first conductive film in said memory cell-forming region to form a first

1. A method of fabricating a semiconductor device, comprising the steps of:(a) depositing a first conductive film over a memory cell-forming region and a peripheral circuit region of a semiconductor substrate; (b) etching said first conductive film in said memory cell-forming region to form a first conductor pattern; (c) forming an insulating film over said first conductor pattern and said first conductive film of said peripheral circuit region and polishing said insulating film to form a first insulating film on non-patterned portions of said first conductor pattern; (d) after the step (c), forming a second conductor pattern over said first insulating film and said first conductor pattern; and (e) subjecting said first conductor pattern and said second conductor pattern to patterning to form a floating gate electrode of a memory cell.