초록 ▼

An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line

An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line. Perform a CMP step to planarize the device and to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole. Alternatively, a blanket deposit of a copper metal line layer covers the diffusion layer and fills the interconnect hole with a copper metal line. Perform a CMP process to planarize the device to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole in a self-aligned deposition process.

대표청구항 ▼

1. An interconnect line on a dielectric layer on a semiconductor device comprising:an interconnect trench hole formed in said dielectric layer, said interconnect trench hole having walls, and a bottom formed in said dielectric layer, a diffusion barrier formed on said walls and formed on said bottom

1. An interconnect line on a dielectric layer on a semiconductor device comprising:an interconnect trench hole formed in said dielectric layer, said interconnect trench hole having walls, and a bottom formed in said dielectric layer, a diffusion barrier formed on said walls and formed on said bottom of said interconnect trench hole, said interconnect trench hole filled with a copper metal line, and a copper metal alloy layer formed on the surface of said copper metal line encapsulating said copper metal line at the top of said interconnect trench hole.