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Methods for ball grid array (BGA) encapsulation mold 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
  • H01L-021/48
  • H01L-021/50
출원번호 US-0886564 (2001-06-21)
발명자 / 주소
  • Leonard E. Mess
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    TraskBritt
인용정보 피인용 횟수 : 17  인용 특허 : 36

초록

A molding machine for encapsulating electronic devices mounted on one side of a substrate, and having a ball-grid array, pin-grid array, or land-grid array on the opposite side, has a two member biased floating plate apparatus to compensate for variations in substrate thickness, and a gas collection

대표청구항

1. An encapsulation method in a molding machine for an electronic device mounted on a first side of a planar substrate comprising:providing an upper mold plate having a cavity therein and at least one clamping ridge located thereon and a lower mold plate having a cavity therein and at least one clam

이 특허에 인용된 특허 (36)

  1. Bhattacharyya Bidyut K. (Chandler AZ) Mallik Debendra (Chandler AZ) Ban Syunsuke (Hyogo JPX) Takikawa Takatoshi (Hyogo JPX) Yamanaka Shosaku (Hyogo JPX), Advance multilayer molded plastic package using mesic technology.
  2. Weber Patrick O. (San Jose CA), Apparatus for encapsulating electronic packages.
  3. De\Ath Roderick M. (Oxfordshire GB2), Apparatus for injection moulding.
  4. Mess Leonard E., Ball grid array (BGA) encapsulation mold.
  5. Saito Hiroshi (Hamamatsu JPX), Ball grid array type semiconductor device.
  6. Marrs Robert C. (Scottsdale AZ) Hirakawa Tadashi (Osaka JPX), Ball grid array with via interconnection.
  7. Golwalkar Suresh V. (Folsom CA) Foehringer Richard (Fair Oaks CA) Wentling Michael (Cameron Park CA) Takatsuki Ryo (Ibaraki-ken JPX) Kawashima Shigeo (Kitakyusyu JPX) Tsujimoto Keiichi (Kitakyusyu JP, Dual sided integrated circuit chip package with offset wire bonds and support block cavities.
  8. Neu H. Karl (Furlong PA), Encapsulaton molding equipment.
  9. DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA) Faraci Tony (Georgetown TX), Fan-out semiconductor chip assembly.
  10. Schmid Hermann (Schwaig DEX), Injection mold for producing the housings of integrated circuits.
  11. Hinterlechner Gerhard,DEX, Injection molding equipment for encapsulating semiconductor die and the like.
  12. Di Stefano Thomas ; Smith John W., Lead configurations.
  13. , Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding.
  14. Variot Patrick (San Jose CA), Method for encapsulating an integrated circuit package.
  15. Thummel Steven G., Method for encasing array packages.
  16. Leveque Denis J. (Milwaukee WI) Czarnecki Neil A. (Mukwonago WI), Method for forming a molded plastic article.
  17. McShane Michael B. (Austin TX) Casto James J. (Austin TX) Joiner Bennett A. (Austin TX), Method for making a thermally enhanced semiconductor device by holding a leadframe against a heatsink through vacuum suc.
  18. Djennas Frank (Austin TX) Nomi Victor K. (Round Rock TX) Pastore John R. (Leander TX) Reeves Twila J. (Austin TX) Postlethwait Les (Lexington TX), Method for making semiconductor device having no die supporting surface.
  19. Drummond Brian (Austin TX), Method for molding using venting pin.
  20. Llabres Raymond (Paris FRX) Antoine Robert (Paris FRX) Lacotte Jean P. (Paris FRX) Marchi Charles (Paris FRX), Method for the manufacture of flexible disks and apparatus for performing this method.
  21. Karavakis Konstantine (Coram NY) Distefano Thomas H. (Monte Sereno CA) Smith ; Jr. John W. (Austin TX) Mitchell Craig (San Jose CA), Method of encapsulating die and chip carrier.
  22. Sweis Jason (Sunnyvale CA) Gilleo Kenneth B. (West Kingston RI), Method of forming interface between die and chip carrier.
  23. Newman Keith G. (Sunnyvale CA), Method of making integrated circuit package having multiple bonding tiers.
  24. Knapp James H. ; Scribner Cliff J. ; Laninga ; Sr. Albert J., Method of manufacturing a semiconductor component.
  25. Oyama Kenshu (Ogouri JPX), Method of manufacturing an electronics package.
  26. Hosokawa Ryuji (Yokohama JPX) Yanagida Satoru (Kawasaki JPX), Method of manufacturing resin-sealed semiconductor device, lead frame used in this method for mounting plurality of semi.
  27. Woosley Alan H. (Austin TX) Downey ; Jr. Harold A. (Austin TX) Mace Everitt W. (Hutto TX), Method of packaging a semiconductor device.
  28. Peters Gerardus Franciscus Wilhelmus,NLX ; Peters Hendrikus Johannus Beernardus,NLX, Moulding apparatus with compensation element.
  29. Wakefield Gene F. (Plano TX), Plastic package with solder grid array.
  30. Wang Kuo K. ; Han Sejin, Pressurized underfill encapsulation of integrated circuits.
  31. Azuma Kousuke,JPX, Resin sealing mold die set with less resin remainder for semiconductor device.
  32. Heckman James K. (Tempe AZ) Carney Francis J. (Gilbert AZ) Geyer Harry J. (Phoenix AZ), Semiconductor chip package and method of forming.
  33. Hatakeyama Atsushi (Kawasaki JPX) Baba Fumio (Kawasaki JPX) Kasai Junichi (Kawasaki JPX) Sato Mitsutaka (Kawasaki JPX), Semiconductor device having a plurality of chips having identical circuit arrangement sealed in package.
  34. Waki Masaki (Kagoshima JPX) Honda Tosiyuki (Kawasaki JPX) Gomi Yukio (Kawasaki JPX), Semiconductor device having a plurality of semiconductor chips.
  35. Haley Kevin (San Jose CA), Tape BGA package die-up/die down.
  36. Ishii Masaaki (Fukuoka JPX), Transfer molding machine for encapsulation of semiconductor devices.

이 특허를 인용한 특허 (17)

  1. Huber, Gregory Arther, Insertable aperture molding.
  2. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
  3. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
  4. Cromwell, Stephen D.; Augustin, Thomas J., Land grid array assembly using a compressive liquid.
  5. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
  6. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
  7. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
  8. Ahmad, Syed Sajid, Method of Interconnecting substrates for electrical coupling of microelectronic components.
  9. Cobbley,Chad A., Method of encapsulating interconnecting units in packaged microelectronic devices.
  10. Cobbley,Chad A., Method of encapsulating packaged microelectronic devices with a barrier.
  11. Bolken, Todd O., Microelectronic devices and microelectronic die packages.
  12. Su,Chao Yuan; Lee,Hsin Hui, Microelectronics package assembly tool and method of manufacture therewith.
  13. Cobbley, Chad A., Packaged microelectronic devices with interconnecting units.
  14. James, Stephen L.; Cobbley, Chad A., Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices.
  15. James,Stephen L.; Cobbley,Chad A., Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices.
  16. Kiritani, Mika, Semiconductor resin molding method.
  17. Farnworth, Warren M., Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece.
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