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특허 상세정보

MyON담기
내보내기 페이스북 공유 카카오톡 공유

ECC code mechanism to detect wire stuck-at faults

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H02M-013/00    G01R-031/28    H03M-013/00   
미국특허분류(USC) 714/753; 714/712; 714/777
출원번호 US-0438063 (1999-11-10)
발명자 / 주소
  • Debendra Das Sharma
출원인 / 주소
  • Hewlett-Packard Company
인용정보 피인용 횟수 : 55  인용 특허 : 4
초록
▼

The inventive mechanism detects wire stuck-at faults, which can be used with any other ECC code. The inventive mechanism determines the number of 1's (or 0's) in the data portion and the ECC code of the data portion. This counted number is then provided with ECC code. The data portion, its ECC, the counted number, and its ECC are transmitted to the destination. At the destination, the message is decoded, and the number of 1's in the received message is compared with the counted number, if there is a discrepancy, then a wire fault is signaled. The mechani...

대표
청구항
▼

1. A method for detecting wire failures during transmission of a data message, wherein the data message comprises a data portion and a first error code (EC) portion that is associated with the data portion, the method comprising the steps of:determining a counter value that represents a number of a specific bit present in the data portion and the first EC portion, wherein the specific bit is selected from the group consisting of a binary one and a binary zero; forming a second EC portion that is associated with the counter value; encoding the data messag...

인용문헌 (4)

  1. Kavehrad Mohsen (Holmdel NJ) Sundberg Carl-Erik (Hazlet NJ), Collision detection technique for an optical passive star local area network using CSMA/CD.
  2. St. John James T. ; Janky William O., Message encoding technique for communication systems.
  3. Kosmach James Joseph, Method and apparatus for decoding a data packet.
  4. Kirby Alan (Hollis NH), Method and apparatus for transmitting and receiving characters using a balanced weight error correcting code.

이 특허를 인용한 특허 (55)

  1. Ulrich, Roger; Shokrollahi, Amin, Bus reversible orthogonal differential vector signaling codes.
  2. Ulrich, Roger; Hunt, Peter, Circuits for efficient detection of vector signaling codes for chip-to-chip communication.
  3. Ulrich, Roger; Hunt, Peter, Circuits for efficient detection of vector signaling codes for chip-to-chip communication.
  4. Simpson, Richard; Stewart, Andrew Kevin John; Hormati, Ali, Clock data alignment system for vector signaling code communications link.
  5. Shokrollahi, Amin; Holden, Brian; Simpson, Richard, Clock-embedded vector signaling codes.
  6. Ulrich, Roger, Data-driven voltage regulator.
  7. Sharma, Debendra Das, ECC code mechanism to detect wire stuck-at faults.
  8. Tajalli, Armin; Cronie, Harm; Shokrollahi, Amin, Efficient processing and detection of balanced codes.
  9. Tajalli, Armin, Enhanced phase interpolation circuit.
  10. Cronie, Harm; Shokrollahi, Amin, Error control coding for orthogonal differential vector signaling.
  11. Shokrollahi, Amin; Ulrich, Roger, Fault tolerant chip-to-chip communication with advanced voltage.
  12. Tajalli, Armin, High performance phase locked loop.
  13. Hormati, Ali; Tajalli, Armin; Shokrollahi, Amin, High speed communications system.
  14. Hormati, Ali; Tajalli, Armin; Shokrollahi, Amin, High speed communications system.
  15. Das Sharma,Debendra, In-line wire error correction.
  16. Tajalli, Armin, Lock detector for phase lock loop.
  17. Hormati, Ali, Low power chip-to-chip bidirectional communications.
  18. Amiri, Omid Talebi; Simpson, Richard, Low power multilevel driver.
  19. Twitto, Moshe; Dor, Avner; Kong, Jun Jin; Chung, Jung Soo, Method and apparatus for encoding and decoding data in memory system.
  20. Shokrollahi, Amin; Ulrich, Roger, Method and apparatus for high speed chip-to-chip communications.
  21. Shokrollahi, Amin; Ulrich, Roger, Method and apparatus for high speed chip-to-chip communications.
  22. Fox, John; Holden, Brian; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe, Methods and systems for chip-to-chip communication with reduced simultaneous switching noise.
  23. Fox, John; Holden, Brian; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger; Simpson, Richard, Methods and systems for high bandwidth chip-to-chip communcations interface.
  24. Fox, John; Holden, Brian; Hormati, Ali; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger, Methods and systems for high bandwidth communications interface.
  25. Fox, John; Holden, Brian; Hormati, Ali; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger, Methods and systems for high bandwidth communications interface.
  26. Fox, John; Holden, Brian; Shokrollahi, Amin; Singh, Anant; Surace, Giuseppe, Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communication.
  27. Shokrollahi, Amin, Methods and systems for reduction of nearest-neighbor crosstalk.
  28. Shokrollahi, Amin, Methods and systems for reduction of nearest-neighbor crosstalk.
  29. Holden, Brian; Shokrollahi, Amin, Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication.
  30. Holden, Brian; Shokrollahi, Amin; Singh, Anant, Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication.
  31. Holden, Brian; Shokrollahi, Amin; Singh, Anant, Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication.
  32. Tajalli, Armin, Multi-stage sampler with increased gain.
  33. Hormati, Ali; Shokrollahi, Amin, Multidrop data transfer.
  34. Hormati, Ali; Shokrollahi, Amin, Multidrop data transfer.
  35. Ulrich, Roger, Multilevel driver for high speed chip-to-chip communications.
  36. Ulrich, Roger, Multilevel driver for high speed chip-to-chip communications.
  37. Cronie, Harm; Shokrollahi, Amin, Orthogonal differential vector signaling.
  38. Holden, Brian; Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  39. Holden, Brian; Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  40. Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  41. Amiri, Omid Talebi; Tajalli, Armin, Phase interpolation circuit.
  42. Tajalli, Armin; Shokrollahi, Amin, Quadrature and duty cycle error correction in matrix phase lock loop.
  43. Tajalli, Armin, Sampler with low input kickback.
  44. Shokrollahi, Amin; Wang Johnston, Margaret, Skew-resistant multi-wire channel.
  45. Cronie, Harm; Shokrollahi, Amin, Storage method and apparatus for random access memory using codeword storage.
  46. Tajalli, Armin, Symmetric linear equalization circuit with increased gain.
  47. Stauffer, David R.; Stewart, Andrew Kevin John; Keay, John D., System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding.
  48. Shokrollahi, Amin, Vector signaling code with improved noise margin.
  49. Shokrollahi, Amin, Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage.
  50. Shokrollahi, Amin, Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage.
  51. Shokrollahi, Amin; Ulrich, Roger, Vector signaling codes with increased signal to noise characteristics.
  52. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  53. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  54. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  55. Tajalli, Armin, Voltage sampler driver with enhanced high-frequency gain.

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