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Method and apparatus for temperature control of a device during testing 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G01R-031/02
  • H05B-001/00
출원번호 US-0734212 (1996-10-21)
발명자 / 주소
  • Jean Luc Pelissier
  • Thomas P. Jones
  • Jonathan E. Turner
  • Mark F. Malinoski
출원인 / 주소
  • Delta Design, Inc.
대리인 / 주소
    Foley & Lardner
인용정보 피인용 횟수 : 56  인용 특허 : 39

초록

A method for controlling the temperature of a DUT during a testing operation, includes a) measuring a parameter related to power consumption by the DUT during testing, such as current consumption; and b) using the parameter related to power consumption to operate a temperature control device to comp

대표청구항

1. A method of controlling the temperature of a device, the method comprising:a) measuring a parameter other than the temperature of the device, wherein the parameter is related to power consumption by the device, the relevant power consumption being the power which is consumed by the device through

이 특허에 인용된 특허 (39)

  1. Lipp Robert J. (15881 Rose Ave. Los Gatos CA 95030), Apparatus for heating and controlling temperature in an integrated circuit chip.
  2. Henderson G. Douglas (Orlando FL), Apparatus for heating and cooling devices under test.
  3. Jones Elmer R. (North Reading MA), Burn-in module.
  4. Fu Deng-Yuan (Sunnyvale CA), Computer-implemented method and system for precise temperature control of a device under test.
  5. Herlein Richard F. (San Jose CA), Control of signal timing apparatus in automatic test systems using minimal memory.
  6. Lewis David A. (Carmel NY) Narayan Chandrasekhar (Hopewell Junction NY), Device to monitor and control the temperature of electronic chips to enhance reliability.
  7. Miyata Eiji (Fuchu JPX) Sugiyama Masahiko (Nirasaki JPX) Kohno Masahiko (Yamanashi JPX) Hatta Masataka (Yamanashi JPX), Electric probing-test machine having a cooling system.
  8. Miyata Eiji (Fuchu) Sugiyama Masahiko (Nirasaki) Kohno Masahiko (Yamanashi) Hatta Masataka (Yamanashi JPX), Electric probing-test machine having a cooling system.
  9. Donovan William J. (San Bernardino CA) Sanford George G. (Los Angeles CA), Electrical test apparatus.
  10. Herlein Richard F. (San Jose CA), Formatter for high speed test system.
  11. Cline Ronald L. (Monte Sereno CA) Campbell John G. (Los Altos CA), Gate having temperature-stabilized delay.
  12. Kenny John D. (Sunnyvale CA) Lei Emilia V. (Union City CA), Heat regulator for integrated circuits.
  13. Burlison Phillip D. (Morgan Hill CA) DeHaven William R. (Los Altos CA) Pogrebinsky Victor (San Jose CA), High speed IDDQ monitor circuit.
  14. Otsuka Naoji (Kawasaki JPX) Yano Kentaro (Yokohama JPX) Sugimoto Hitoshi (Yokohama JPX), Ink-jet recording apparatus and temperature control method therefor.
  15. Hirano Masashi (Tokyo JPX), LSI with built-in test circuit and testing method therefor.
  16. Craft David J. (Austin TX), Method and apparatus for a thermal protection unit.
  17. Schinabeck John (Pleasanton CA) Murdock James R. (San Jose CA), Method and apparatus for applying and monitoring programmed test signals during automated testing of electronic circuits.
  18. Pickering John R. (Alderford GBX), Method and apparatus for conditioning an electronic component having a characteristic subject to variation with temperat.
  19. Takamine Henry (Gardena CA), Method and apparatus for determination of junction-to-case thermal resistance for a hybrid circuit element.
  20. Herlein Richard F. (San Jose CA) Davis Jeffrey A. (Santa Clara CA) Cotriss E. James (San Jose CA), Method and apparatus for dynamically controlling the timing of signals in automatic test systems.
  21. Herlein Richard F. (San Jose CA) Davis Jeffrey A. (Santa Clara CA) Cotriss E. James (San Jose CA), Method and apparatus for dynamically controlling the timing of signals in automatic test systems.
  22. Taraci Richard (Phoenix AZ) Taraci Brian (Laguna Niguel CA) Gorgenyi Imre (Scottsdale AZ), Method and apparatus for maintaining electrically operating device temperatures.
  23. Taraci Richard (Phoenix AZ) Taraci Brian (Laguna Niguel CA) Gorgenyi Imre (Scottsdale AZ), Method and apparatus for maintaining electrically operating device temperatures.
  24. Schinabeck John (Pleasanton CA), Method and apparatus for monitoring automated testing of electronic circuits.
  25. Schinabeck John (Pleasanton CA) Murdock James R. (San Jose CA), Method and apparatus for monitoring response signals during automated testing of electronic circuits.
  26. Farwell William D. (Thousand Oaks CA) Henson Bradley S. (Lakewood CA), Method for self regulating CMOS digital microcircuit burn-in without ovens.
  27. Miller Vernon R. (Atlanta GA) Roberts Lincoln E. (Decatur GA), Microelectronic burn-in system.
  28. Eager George (Cambridge MA) Schey Thomas J. (Woonsocket RI) Selverstone Peter (Cambridge MA), Mixing valve air source.
  29. Schaper Charles D. ; El-Awady Khalid A. ; Kailath Thomas, Multizone bake/chill thermal cycling module.
  30. Rignall Michael W. (Dursley GB3), Oven for the burn-in of integrated circuits.
  31. Ahmad Aftab (Boise ID) Weber Larren G. (Caldwell ID) Green Robert S. (Boise ID), Semiconductor array having built-in test circuit for wafer level testing.
  32. Goto Masaharu (Hanno CO JPX) Koerner Christopher (Fort Collins CO), System and method for dynamic power compensation.
  33. Eager George (Cambridge MA) Selverstone Pater (Cambridge MA), Temperature control for device under test.
  34. Burton David P. (Parteen IEX) Dillon Paul A. (Foxrock IEX) Stephenson Malcolm I. (Adare IEX), Temperature control instrument for electronic components under test.
  35. Hamilton Harold E. (Minneapolis MN) Zimmer James R. (Cologne MN), Temperature regulator for burn-in board components.
  36. West Burnell G. (Fremont CA) Herlein Richard F. (San Jose CA), Test period generator for automatic test equipment.
  37. Jones Elmer R. (North Reading MA), Thermal control system for a semi-conductor burn-in.
  38. Jones Elmer R. (North Reading MA), Thermal control system for a semi-conductor burn-in.
  39. Stanley Gerald R. (Mishawaka IN), Thermal protection circuit for the die of a transistor.

이 특허를 인용한 특허 (56)

  1. Borkar, Shekhar Y., Active cooling to reduce leakage power.
  2. Borkar,Shekhar Y., Active cooling to reduce leakage power.
  3. Kabbani,Samer; Beyerle,Rick; Bachelder,Don, Active thermal control system with miniature liquid-cooled temperature control device for electronic device testing.
  4. Wall, Charles B.; Barnes, Cynthia M., Apparatus and method for controlling the temperature of an electronic device under test.
  5. Wall,Charles B.; Barnes,Cynthia M., Apparatus and method for controlling the temperature of an electronic device under test.
  6. Di Stefano, Thomas H., Apparatus to control device temperature utilizing multiple thermal paths.
  7. Di Stefano, Thomas H., Apparatus to control device temperature utilizing multiple thermal paths.
  8. Noble, Scott; Garcia, Edward; Polyakov, Evgeny; Truebenbach, Eric L.; Merrow, Brian S., Bulk feeding disk drives to disk drive testing systems.
  9. Noble, Scott; Garcia, Edward; Polyakov, Evgeny; Truebenbach, Eric L.; Merrow, Brian S., Bulk feeding disk drives to disk drive testing systems.
  10. Truebenbach, Eric L., Bulk transfer of storage devices using manual loading.
  11. Truebenbach, Eric L., Bulk transfer of storage devices using manual loading.
  12. Martino, Peter, Damping vibrations within storage device testing systems.
  13. Merrow, Brian S.; Truebenbach, Eric L.; Smith, Marc Lesueur, Dependent temperature control within disk drive testing systems.
  14. Merrow, Brian S.; Garcia, Edward; Polyakov, Evgeny, Disk drive transport, clamping and testing.
  15. Merrow, Brian S.; Garcia, Edward; Polyakov, Evgeny, Disk drive transport, clamping and testing.
  16. Merrow, Brian S.; Garcia, Edward; Polyakov, Evgeny, Disk drive transport, clamping and testing.
  17. Arena, John Joseph; Suto, Anthony J., Electronic assembly test system.
  18. Merrow, Brian S., Enclosed operating area for disk drive testing systems.
  19. Merrow, Brian S., Enclosed operating area for storage device testing systems.
  20. Campbell, Philip; Wrinn, Joseph F., Engaging test slots.
  21. Cruzan, Gregory; Landon, Frank, Evaporator.
  22. Wetzel, Stephen Aloysius; Trieu, Thanh, Heat sink pedestal with interface medium chamber.
  23. Merrow, Brian S.; Akers, Larry W., Heating storage devices in a testing system.
  24. Barth, Roland; Benedix, Alexander; Düregger, Reinhard; Grosse, Stephan, Integrated circuit with temperature sensor and method for heating the circuit.
  25. Igarashi, Shinya; Kanke, Atsushi; Minamitani, Rintarou; Nakada, Keiichi; Watanabe, Izumi, Mass airflow measuring apparatus.
  26. Igarashi, Shinya; Kanke, Atsushi; Minamitani, Rintarou; Nakada, Keiichi; Watanabe, Izumi, Mass airflow measuring apparatus.
  27. Abadeer, Wagdi W.; Pilo, Harold; Seitzer, Daryl M., Method and apparatus for burn-in optimization.
  28. Abadeer,Wagdi W.; Pilo,Harold; Seitzer,Daryl M., Method and apparatus for burn-in optimization.
  29. Di Stefano, Thomas H., Method and apparatus for controlling temperature.
  30. Di Stefano, Peter T.; Di Stefano, Thomas H., Method and apparatus for setting and controlling temperature.
  31. Kita, Kazumi; Kurasawa, Tadahiro; Muramatsu, legal representative, Yasuo, Method of detecting abnormality in burn-in apparatus.
  32. Wetzel, Stephen Aloysius; Trieu, Thanh, Method of manufacturing a heat sink pedestal device with interface medium chamber.
  33. Takeuchi,Kiyoshi; Nakamura,Hidehito; Ide,Takehiko; Koizumi,Hirohisa, Optical disc apparatus and disc apparatus.
  34. Hunt, Dean M.; Haga, Don, Optical testing of integrated circuits with temperature control.
  35. Hunt,Dean M.; Haga,Don, Optical testing of integrated circuits with temperature control.
  36. Taylor, Troy; Callaway, Michael; Jones, Tom, Soak profiling.
  37. Merrow, Brian S.; Akers, Larry W., Storage device temperature sensing.
  38. Merrow, Brian S.; Akers, Larry W., Storage device temperature sensing.
  39. Merrow, Brian S., Storage device testing system cooling.
  40. Merrow, Brian S., Storage device testing system cooling.
  41. Merrow, Brian S.; Akers, Larry W., Storage device testing system with a conductive heating assembly.
  42. Jones, Thomas P.; Turner, Jonathan E.; Malinoski, Mark F., Temperature control of electronic devices using power following feedback.
  43. Merrow, Brian S., Temperature control within disk drive testing systems.
  44. Merrow, Brian S., Temperature control within disk drive testing systems.
  45. Merrow, Brian S., Temperature control within storage device testing systems.
  46. Lopez,Christopher A.; Denheyer,Brian J., Temperature sensing and prediction in IC sockets.
  47. Merrow, Brian S.; Krikorian, Nicholas C., Test slot cooling system for a storage device testing system.
  48. Merrow, Brian S.; Krikorian, Nicholas C., Test slot cooling system for a storage device testing system.
  49. Fenk,C. Walter, Thermal control system for environmental test chamber.
  50. Merrow, Brian S., Thermal control system for test slot of test rack for disk drive testing system with thermoelectric device and a cooling conduit.
  51. Polyakov, Evgeny; Garcia, Edward; Truebenbach, Eric L.; Merrow, Brian S.; Whitaker, Brian J., Transferring disk drives within disk drive testing systems.
  52. Polyakov, Evgeny; Garcia, Edward; Truebenbach, Eric L.; Merrow, Brian S.; Whitaker, Brian J., Transferring disk drives within disk drive testing systems.
  53. Polyakov, Evgeny; Garcia, Edward; Truebenbach, Eric L.; Merrow, Brian S.; Whitaker, Brian J., Transferring storage devices within storage device testing systems.
  54. Toscano, John; Polyakov, Evgeny; Garcia, Edward; Truebenbach, Eric L.; Merrow, Brian S.; Whitaker, Brian J., Transferring storage devices within storage device testing systems.
  55. Toscano, John; Polyakov, Evgeny; Garcia, Edward; Truebenbach, Eric L.; Merrow, Brian S.; Whitaker, Brian J., Transferring storage devices within storage device testing systems.
  56. Merrow, Brian S., Vibration isolation within disk drive testing systems.
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