초록 ▼

An embedded system bus is woven between a plurality of embedded master elements and at least one slave element within the FPGA device, and provides an external processor interface allowing direct access to any of the plurality of embedded slave elements. Using the embedded system bus, any of a plura

An embedded system bus is woven between a plurality of embedded master elements and at least one slave element within the FPGA device, and provides an external processor interface allowing direct access to any of the plurality of embedded slave elements. Using the embedded system bus, any of a plurality of masters may be allowed to program an embedded element, e.g., embedded FPGA logic, whereas conventional FPGAs allowed only a single master (e.g., a processor) to program the embedded FPGA logic. The embedded system bus is a group of signals, typically data, address and control, that connects system elements together and provides a basic protocol for the flow of data. The embedded system bus allows for control, configuration and status determination of the FPGA device. The embedded system bus is preferably a dedicated function available at all times for arbitrated access to allow communication between the various embedded system components.

대표청구항 ▼

1. A Field Programmable Gate Array, comprising:a plurality of master/slave elements, wherein at least one said elements is an FPGA configuration controller; an embedded system bus between said plurality of master/slave elements; and an external configuration interface providing external access to sa

1. A Field Programmable Gate Array, comprising:a plurality of master/slave elements, wherein at least one said elements is an FPGA configuration controller; an embedded system bus between said plurality of master/slave elements; and an external configuration interface providing external access to said embedded system bus from a device external to said Field Programmable Gate Array.