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Method for forming copper interconnections in semiconductor component using electroless plating system

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/4763
  • H01L-021/44
출원번호 US-0097308 (2002-03-15)
우선권정보 KR-0060732 (2001-09-28)
발명자 / 주소
  • Chan-Hwa Jung KR
  • Sung-Min Cho KR
  • Youn-Jin Oh KR
출원인 / 주소
  • Sungkyunkwan University KR
대리인 / 주소
    Burns, Doane, Swecker & Mathis, LLP
인용정보 피인용 횟수 : 22  인용 특허 : 5

초록

Disclosed is a method for forming copper interconnections of a semiconductor component using an electroless plating system, which enables copper to be grown only in corresponding interconnection regions. In such a method, a wafer is cleaned, the wafer is pretreated with a metal seed solution so as t

대표청구항

1. A method for forming copper interconnections in a semiconductor component using an electroless plating system comprising:a first step of cleaning a wafer in order to remove contamination sources and to allow uniform copper deposition; a second step of pretreating the wafer with a metal seed solut

이 특허에 인용된 특허 (5)

  1. Bhan Mohan K. ; Chen Ling ; Zheng Bo ; Jones Justin ; Ganguli Seshadri ; Levine Timothy ; Wilson Samuel ; Chang Mei, Method for treating a deposited film for resistivity reduction.
  2. Ho Paul Kwok Keung,SGX ; Zhou Mei Sheng,SGX ; Gupta Subhash,SGX ; Ramasamy Chockalingam,SGX, Method to deposit a copper seed layer for dual damascene interconnects.
  3. Chung-Shi Liu TW; Chen-Hua Yu TW, Method to improve copper process integration.
  4. Richard P. Volant ; Peter S. Locke ; Kevin S. Petrarca ; David M. Rockwell ; Seshadri Subbanna, Selective plating process.
  5. Eichelberger Charles W. (1256 Waverly Pl. Schenectady NY 12308), Three-dimensional multichip module systems.

이 특허를 인용한 특허 (22)

  1. Kolics, Artur; Petrov, Nicolai; Ting, Chiu; Ivanov, Igor, Activation-free electroless solution for deposition of cobalt and method for deposition of cobalt capping/passivation layer on copper.
  2. Weiner, Kurt H.; Chiang, Tony P.; Francis, Aaron; Schmidt, John, Advanced mixing system for integrated tool having site-isolated reactors.
  3. Weidman, Timothy W.; Wijekoon, Kapila P.; Zhu, Zhize; Gelatos, Avgerinos V. (Jerry); Khandelwal, Amit; Shanmugasundram, Arulkumar; Yang, Michael X.; Mei, Fang; Moghadam, Farhad K., Contact metallization scheme using a barrier layer over a silicide layer.
  4. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  5. Stewart, Michael P.; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Eaglesham, David J., Electroless deposition process on a silicon contact.
  6. Naab, Benjamin, Electroless metallization of through-holes and vias of substrates with tin-free ionic silver containing catalysts.
  7. Kolics, Artur; Petrov, Nicolai; Ting, Chiu; Ivanov, Igor C., Method for electroless deposition of phosphorus-containing metal films onto copper with palladium-free activation.
  8. Lopatin,Sergey; Shanmugasundram,Arulkumar; Lubomirsky,Dmitry; Pancham,Ian A., Method for forming CoWRe alloys by electroless deposition.
  9. Grunow, Stephan; Kumar, Kaushik A.; Petrarca, Kevin Shawn; Volant, Richard Paul, Method for forming conductive structures.
  10. Ivanov, Igor C.; Zhang, Weiguo; Kolics, Artur, Method for strengthening adhesion between dielectric layers formed adjacent to metal layers.
  11. Ivanov, Igor C.; Zhang, Weiguo; Kolics, Artur, Method for strengthening adhesion between dielectric layers formed adjacent to metal layers.
  12. Chiang, Tony P.; Lazovsky, David E.; Boussie, Thomas R.; Gorer, Alexander, Methods for discretized processing of regions of a substrate.
  13. Kailasam,Sridhar K.; Drewery,John; Reid,Jonathan D.; Webb,Eric G.; Sukamto,Johanes H., Methods for the electrochemical deposition of copper onto a barrier layer of a work piece.
  14. Lubomirsky, Dmitry; Weidman, Timothy W.; Shanmugasundram, Arulkumar; Kovarsky, Nicolay Y.; Wijekoon, Kapila, Process for electroless copper deposition.
  15. Uzoh, Cyprian Emeka; Haba, Belgacem; Mitchell, Craig, Reliable packaging and interconnect structures.
  16. Uzoh, Cyprian Emeka; Haba, Belgacem; Mitchell, Craig, Reliable packaging and interconnect structures.
  17. Romero, Patricio E.; Clendenning, Scott B.; Roberts, Jeanette M.; Gstrein, Florian, Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD).
  18. Basker,Veeraraghaven S.; Deligianni,Hariklia; Pranatharthi Haran,Balasubramanian S.; Kelly,James J.; Lavoie,Christian; Totir,George G., Selective silicide formation by electrodeposit displacement reaction.
  19. Nogami, Takeshi; Komai, Naoki, Semiconductor production device and production method for semiconductor device.
  20. Wark,James M.; Ahmad,Syed S., Sloped vias in a substrate, spring-like contacts, and methods of making.
  21. Weiner, Kurt H.; Chiang, Tony P.; Pinto, Gustavo A., System and method for increasing productivity of combinatorial screening.
  22. Chiang, Tony P.; Lazovsky, David E.; Boussie, Thomas R.; McWaid, Thomas H.; Gorer, Alexander, Systems for discretized processing of regions of a substrate.
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