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Post-deposition treatment to enhance properties of Si-O-C low K films 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0632669 (2000-08-07)
우선권정보 EP-0402074 (1999-08-17)
발명자 / 주소
  • Li-Qun Xia
  • Frederic Gaillard FR
  • Ellie Yieh
  • Tian H. Lim
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend & Townsend & Crew
인용정보 피인용 횟수 : 47  인용 특허 : 12

초록

A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment

대표청구항

1. A method for forming an insulation layer over a substrate and treating the insulation layer after its formation, the method comprising:flowing a process gas into a substrate processing chamber in which the substrate is disposed; heating the substrate in the substrate processing chamber to form a

이 특허에 인용된 특허 (12)

  1. Imahashi Issei (Yamanashi JPX), Apparatus for processing semiconductor wafer comprising continuously rotating wafer table and plural chamber compartment.
  2. Vines Landon B. (San Antonio TX) Koenigseder Sigmund A. (San Antonio TX) Cain John L. (Taylor TX) Lee Chang-Ou (San Antonio TX) Fujishiro Felix (San Antonio TX), Densification in an intermetal dielectric film.
  3. Sivaramakrishnan Visweswaren, Method for depositing low K SI-O-F films using SIF.sub.4 /oxygen chemistry.
  4. Xia Li-Qun ; Pokharrna Himanshu ; Lim Tian-Hoe, Method for removing residue from substrate processing chamber exhaust line for silicon-oxygen-carbon deposition process.
  5. Nakano Tadashi (Chiba JPX) Sato Nobuyoshi (Chiba JPX) Ohta Tomohiro (Chiba JPX) Yamamoto Hiroshi (Tokyo JPX), Method of chemical mechanical polishing planarization of an insulating film using an etching stop.
  6. Yau Wai-Fan ; Cheung David ; Jeng Shin-Puu ; Liu Kuowei ; Yu Yung-Cheng, Method of depositing a low k dielectric with organo silane.
  7. Goo Ju-seon,KRX ; Choi Ji-hyun,KRX ; Hwang Byung-keun,KRX ; Lee Hae-jeong,KRX, Method of fabricating and curing spin-on-glass layers by electron beam irradiation.
  8. Sato Nobuyoshi (Chiba JPX) Ohta Tomohiro (Chiba JPX) Nakano Tadashi (Chiba JPX) Yamamoto Hiroshi (Chiba JPX), Method of manufacturing insulating film of semiconductor device and apparatus for carrying out the same.
  9. Yieh Ellie ; Xia Li-Qun ; Nemani Srinivas, Methods for shallow trench isolation.
  10. Jang Syun-Ming,TWX ; Chen Ying-Ho,TWX ; Yu Chen-Hua,TWX, Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer.
  11. Kamo Lloyd, Thin insulative ceramic coating and process.
  12. Lee Peter W. (Fremont CA) Wang David N. (Saratoga CA) Nagashima Makoto (Machida JPX) Fukuma Kazuto (Ibaraki JPX) Sato Tatsuya (Narita JPX), Two step process for forming void-free oxide layer over stepped surface of semiconductor wafer.

이 특허를 인용한 특허 (47)

  1. Li,Lihua; Huang,Tzu Fang; Sugiarto, legal representative,Jerry; Xia,Li Qun; Lee,Peter Wai Man; M'Saad,Hichem; Cui,Zhenjiang; Park,Sohyun; Sugiarto, deceased,Dian, Adhesion improvement for low k dielectrics.
  2. Li,Lihua; Huang,Tzu Fang; Sugiarto, legal representative,Jerry; Xia,Li Qun; Lee,Peter Wai Man; M'Saad,Hichem; Cui,Zhenjiang; Park,Sohyun; Sugiarto,Dian, Adhesion improvement for low k dielectrics.
  3. Sriram,Mandyam A.; O'Loughlin,Jennifer, Ambient gas treatment of porous dielectric.
  4. Andideh,Ebrahim; Peterson,Kevin L.; Bielefeld,Jeff, Chemical vapor deposition chamber pre-deposition treatment for improved carbon doped oxide thickness uniformity and throughput.
  5. Yin, Zhiping; Iyer, Ravi; Glass, Thomas R.; Holscher, Richard; Niroomand, Ardavan; Somerville, Linda K.; Sandhu, Gurtej S., Circuitry and gate stacks.
  6. Li,Weimin; Yin,Zhiping, Compositions of matter and barrier layer compositions.
  7. Nakamori, Mitsunori; Iino, Tadashi; Uchida, Noritaka; Orii, Takehiko, Computer readable storage medium for controlling substrate processing apparatus.
  8. Wurm, Stefan, Dense seed layer and method of formation.
  9. Wurm, Stefan, Dense seed layer and method of formation.
  10. Wurm, Stefan, Dense seed layer and method of formation.
  11. Lakshmanan,Annamalai; Lee,Albert; Lee,Ju Hyung; Kim,Bok Hoen, Hermetic low dielectric constant layer for barrier applications.
  12. Liang,Mong Song; Lu,Yung Cheng; Chang,Huilin, Integrated treatment method for obtaining robust low dielectric constant materials.
  13. Spencer,Gregory S.; Junker,Kurt H.; Vires,Jason A., Integration of ultra low K dielectric in a semiconductor fabrication process.
  14. Li,Weimin; Yin,Zhiping; Budge,William, Low K interlevel dielectric layer fabrication methods.
  15. Li, Weimin; Yin, Zhiping; Budge, William, Low k interlevel dielectric layer fabrication methods.
  16. Li,Weimin; Yin,Zhiping; Budge,William, Low k interlevel dielectric layer fabrication methods.
  17. Li, Lihua; Huang, Tzu-Fang; Xia, Li-Qun; Rocha-Alvarez, Juan Carlos; Zhao, Maosheng, Method for curing low dielectric constant film using direct current bias.
  18. Lu, Chih-Cheng; Chang, Wen; Jeng, Syun-Ming, Method for recycling semiconductor wafers having carbon doped low-k dielectric layers.
  19. Spencer, Gregory S.; Turner, Michael D., Method of making a semiconductor device having a low K dielectric.
  20. Schmitt, Francimar Campana; Xia, Li-Qun; Nguyen, Son Van; Venkataraman, Shankar, Method of modifying interlayer adhesion.
  21. Schmitt,Francimar Campana; Xia,Li Qun; Nguyen,Son Van; Venkataraman,Shankar, Method of modifying interlayer adhesion.
  22. Balseanu, Mihaela; Shek, Meiyee; Xia, Li Qun; M'Saad, Hichem, Method to improve the step coverage and pattern loading for dielectric films.
  23. Balseanu, Mihaela; Xia, Li-Qun; Shek, Mei-Yee; M'Saad, Hichem, Method to improve the step coverage and pattern loading for dielectric films.
  24. Xu, Huiwen; Shek, Mei-Yee; Xia, Li-Qun; Al-Bayati, Amir; Witty, Derek; M'Saad, Hichem, Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k<2.5) dielectrics.
  25. Schmitt, Francimar Campana; Xia, Li Qun; Nguyen, Son Van; Venkataraman, Shankar, Methods of modifying interlayer adhesion.
  26. Schmitt, Francimar Campana; Xia, Li-Qun; Nguyen, Son Van; Venkataraman, Shankar, Methods of modifying interlayer adhesion.
  27. Xia, Li-Qun; Gaillard, Frederic; Yieh, Ellie; Lim, Tian H., Post-deposition treatment to enhance properties of Si-O-C low K films.
  28. Xia, Li-Qun; Gaillard, Frederic; Yieh, Ellie; Lim, Tian H., Post-deposition treatment to enhance properties of Si-O-C low films.
  29. Holscher, Richard; Yin, Zhiping; Glass, Tom, Semiconductor constructions.
  30. Holscher, Richard; Yin, Zhiping; Glass, Tom, Semiconductor constructions having antireflective portions.
  31. Furusawa, Takeshi; Ryuzaki, Daisuke; Sakuma, Noriyuki; Machida, Shuntaro; Hinode, Kenji; Yoneyama, Ryou, Semiconductor device and process for producing the same.
  32. Farkas, Janos; Kordic, Srdjan; Goldberg, Cindy, Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and material for coupling a dielectric layer and a metal layer in a semiconductor device.
  33. Farkas, Janos; Calvo-Munoz, Maria Luisa; Kordic, Srdjan, Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device.
  34. Holscher, Richard; Yin, Zhiping; Glass, Tom, Semiconductor devices having antireflective material.
  35. Holscher, Richard; Yin, Zhiping; Glass, Tom, Semiconductor processing methods.
  36. Sandhu, Gurtej S.; Sharan, Sujit, Semiconductor processing methods of forming an utilizing antireflective material layers, and methods of forming transistor gate stacks.
  37. Sandhu,Gurtej S.; Sharan,Sujit, Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks.
  38. DeBoer, Scott Jeffrey; Moore, John T., Semiconductor processing methods of transferring patterns from patterned photoresists to materials.
  39. DeBoer, Scott Jeffrey; Moore, John T., Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride.
  40. DeBoer,Scott Jeffrey; Moore,John T., Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride.
  41. DeBoer,Scott Jeffrey; Moore,John T., Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride.
  42. DeBoer,Scott Jeffrey; Moore,John T., Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride.
  43. Lakshmanan,Annamalai; Raj,Daemian; Schmitt,Francimar; Kim,Bok Hoen; Balasubramanian,Ganesh, Situ oxide cap layer development.
  44. DeBoer,Scott Jeffrey; Moore,John T., Structures comprising a layer free of nitrogen between silicon nitride and photoresist.
  45. Wang, Runshun; Wang, Chao; Cheng, Lien Huang, Techniques for removal of photolithographic films.
  46. Chang, Hui-Lin; Ko, Chung-Chi; Bao, Tien I; Lu, Yun-Chen, Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties.
  47. van den Hoek, Willibrordus Gerardus Maria; Draeger, Nerissa S.; Humayun, Raashina; Hill, Richard S.; Sun, Jianing; Ray, Gary William, VLSI fabrication processes for introducing pores into dielectric materials.
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