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Method and system for perfetching data in a bridge system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
출원번호 US-0275857 (1999-03-24)
발명자 / 주소
  • Gary William Batchelor
  • Carl Evan Jones
  • Forrest Lee Wade
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    David W. Victor
인용정보 피인용 횟수 : 36  인용 특허 : 48

초록 ▼

Disclosed is a bridge system and method for prefetching data to return to a read request from an agent. The bridge system includes at least one memory device including a counter indicating a number of prefetch operations to perform to prefetch all the requested data, a first buffer capable of storin

대표청구항 ▼

1. A method for performing initialization operations in response to a read request from an agent device via a bridge system, comprising:receiving a read request indicating a start address of requested data and a transaction length of the read request from the agent via the bridge system; determining

이 특허에 인용된 특허 (48)

  1. Szczepanek Andre,GB2, Adapter having data aligner including register being loaded to or from memory with an offset in accordance with predete.
    상세보기
  2. Ukai Tohiyuki,JPX ; Kagimasa Toyohiko,JPX ; Mori Toshiaki,JPX ; Shimizu Masaaki,JPX, Allocation method of physical regions of a disc array to a plurality of logically-sequential data, adapted for increased.
    상세보기
  3. Shah Nilesh (Folsom CA) Ajanovic Jasmin (Folsom CA) Dahmani Dahmane (Folsom CA), Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer.
    상세보기
  4. Callison Ryan A. ; Chandler Gregory T., Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asy.
    상세보기
  5. Nakayama Wataru,JPX ; Watabe Teruyasu,JPX, Apparatus for controlling a direct memory access operation in an image processing apparatus.
    상세보기
  6. Vo Tri Tinh, Asynchronous PCI-to-PCI Bridge.
    상세보기
  7. Amini Nader (Boca Raton FL) Boury Bechara Fouad (Boca Raton FL) Brannon Sherwood (Boca Raton FL) Horne Richard Louis (Boynton Beach FL) Lohman Terence Joseph (Boca Raton FL), Bidirectional data buffer for a bus-to-bus interface unit in a computer system.
    상세보기
  8. Katz Sagi (Haifa ILX) Wall William Alan (Austin TX) Kulik Amy (Austin TX) Cronin ; III Daniel R. (Lake Worth FL), Bridge between two buses of a computer system that latches signals from the bus for use on the bridge and responds accor.
    상세보기
  9. Shah Nilesh, Bus bridge circuit flushing buffer to a bus during one acquire/relinquish cycle by providing empty address indications.
    상세보기
  10. Young Bruce ; Rasmussen Norman, Bus bridge for responding to received first write command by storing data and for responding to received second write co.
    상세보기
  11. Shibata Yuji (Kawasaki JPX) Okazaki Makoto (Kawasaki JPX) Tanihira Hisamitsu (Kawasaki JPX) Okada Katsuyuki (Tokorozawa JPX), Bus interface structure and system for controlling the bus interface structure.
    상세보기
  12. Amini Nader (Boca Raton FL) Kohli Ashu (Delray Beach FL) Santos Gregory N. (Boca Raton FL), Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and.
    상세보기
  13. Amini Nader (Boca Raton FL) Kohli Ashu (Delray Beach FL) Santos Gregory N. (Boca Raton FL), Bus-to-bus read prefetch logic for improving information transfers in a multi-bus information handling system (bus-to-bu.
    상세보기
  14. Zeller Charles P. ; Gaskins Darius D., Cache-based computer system employing a peripheral bus interface unit with cache write-back suppression and processor-p.
    상세보기
  15. Shin Dong Woo,KRX ; Yoo In Sun,KRX, Circuit for plug/play in peripheral component interconnect bus.
    상세보기
  16. Potter Bruce (Austin TX), Commonly housed multiple processor type computing system and method of manufacturing the same.
    상세보기
  17. Lambrecht Andy ; Belt Steve L. ; Dutton Drew, Computer system including a plurality of multimedia devices each having a high-speed memory data channel for accessing s.
    상세보기
  18. Jennings William E. (Cary NC) Chan Roland G. (Mountain View CA) Wong John L. (Belmont CA), Computer system with cascaded peripheral component interconnect (PCI) buses.
    상세보기
  19. Kanai Tatsunori,JPX ; Asano Shigehiro,JPX ; Aikawa Takeshi,JPX ; Amano Shinya,JPX, Continuous data server apparatus and data transfer scheme enabling multiple simultaneous data accesses.
    상세보기
  20. Kobayashi Souichi,JPX, Data processing system controlling bus access to an arbitrary sized memory area.
    상세보기
  21. Callison Ryan A. ; Chard Gary F., Disk array controller for performing exclusive or operations.
    상세보기
  22. Stewart John W. (Wichita KS) Gates Dennis E. (Wichita KS) DeKoning Rodney A. (Wichita KS) Rink Curtis W. (Wichita KS), Disk array storage system architecture for parity operations simultaneous with other data operations.
    상세보기
  23. Fenwick David M. (Chelmsford MA) Foley Denis J. (Shrewsbury MA) Van Doren Stephen R. (Shrewsbury MA) Hartwell David W. (Bocton MA) Bloom Elbert (Marlboro MA) Hetherington Ricky C. (Westboro MA), Distributed data bus sequencing for a system bus with separate address and data bus protocols.
    상세보기
  24. Nain Yueh-Yao,TWX, Distributed pre-fetch buffer for multiple DMA channel device.
    상세보기
  25. Dunnihoo Jeffrey Clay, Dynamically allocating space in RAM shared between multiple USB endpoints and USB host.
    상세보기
  26. Kawakami Satoshi,JPX, Information reproduction apparatus and information reproduction method.
    상세보기
  27. Johnson William M. (San Jose CA), Input/output controller incorporating address mapped input/output windows and read ahead/write behind capabilities.
    상세보기
  28. Chejlava ; Jr. Edward J. (San Bruno CA) Cline Leslie E. (Sunnyvale CA) Curt Kenneth C. (Saratoga CA), Interface circuit for transferring data between host and mass storage by assigning address in the host memory space and.
    상세보기
  29. Hayek George R. ; Langendorf Brian K. ; Kundu Aniruddha ; Bains Kuljit S. ; Solomon Gary A., Low load host/PCI bus bridge.
    상세보기
  30. Snyder Michael Dean ; Patel Rajesh, Mechanism for sharing data cache resources between data prefetch operations and normal load/store operations in a data processing system.
    상세보기
  31. Garbus Elliott ; Davis Barry, Method and apparatus for enabling intelligent I/O subsystems using PCI I/O devices.
    상세보기
  32. Hong Soon Chul, Method and apparatus for extending a local PCI bus to a remote I/O backplane.
    상세보기
  33. Dowling Eric M., Method and apparatus for high performance branching in pipelined microsystems.
    상세보기
  34. Ajanovic Jasmin, Method and apparatus for selectively receiving write data within a write buffer of a host bridge.
    상세보기
  35. McGarvey James E. (Rochester NY), Method and apparatus for transferring data in portable image processing system.
    상세보기
  36. Neal Danny Marvin ; Thurber Steven Mark, Method and system for supporting peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host br.
    상세보기
  37. Spaniol David G. (Scottsdale AZ) Murray Joseph (Scottsdale AZ), Method for performing writes of non-contiguous bytes on a PCI bus in a minimum number of write cycles.
    상세보기
  38. Kulik Amy ; Wall William Alan ; Cronin ; III Daniel R., PCI/ISA bridge having an arrangement for responding to PCI address parity errors for internal PCI slaves in the PCI/ISA.
    상세보기
  39. Elazar Uri (Alon Hagalil ILX) Peled Yehuda (Bet Shearim ILX), Peripheral component interconnect bus system having latency and shadow timers.
    상세보기
  40. Hopkins Charles H., Prefetching variable length data.
    상세보기
  41. Andrade Victor F. (Austin TX) Horton Kelly M. (Austin TX), Prepaging during PCI master initiated wait cycles.
    상세보기
  42. Carson Dave ; Young Bruce ; Rasmussen Norman ; Fischer Stephen ; Rabe Jeffrey, Signaling protocol for a peripheral component interconnect.
    상세보기
  43. Guthrie Guy Lynn (Austin TX) Neal Danny Marvin (Round Rock TX) Silha Edward John (Austin TX) Thurber Steven Mark (Austin TX), System and method for enhancement of system bus to mezzanine bus transactions.
    상세보기
  44. Stager Gary B. (Plano TX), System for accessing distributed memory by breaking each accepted access request into series of instructions by using se.
    상세보기
  45. Mills Karl Scott ; Linstad Lauren Emory ; Brannon Sherwood ; Bonnelycke Mark Emil ; Owen Richard Charles Andrew, Transaction queue in a graphics controller chip.
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  46. Choe Gwangwoo ; MacDonald Jim, Virtual serial data transfer mechanism.
    상세보기
  47. Rasmussen Marvin W. (Austin TX), Well-logging data processing system having segmented serial processor-to-peripheral data links.
    상세보기
  48. Powell V. Thomas (Moncks Corner SC) Goeppel Anton (Burgau DEX) Roehrl Gerhard (Stadtbergen DEX) King Edward C. (Fremont CA), Work station or similar data processing system including interfacing means to a data channel.
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이 특허를 인용한 특허 (36)

  1. Davies,Ian Robert; Maine,Gene; Pecone,Victor Key, Apparatus and method for adopting an orphan I/O port in a redundant storage controller.
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  2. Auernhammer, Florian A.; McDonald, Joseph G., Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer system.
    상세보기
  3. Auernhammer, Florian A.; McDonald, Joseph G., Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer system.
    상세보기
  4. Maine,Gene, Broadcast bridge apparatus for transferring data to redundant memory subsystems in a storage controller.
    상세보기
  5. Takeda,Yoshihiko; Yuasa,Kentarou, Bus connection circuit and bus connection system having plural request queues, a bus interface portion outputting request signals, an arbiter performing arbitration of plural requests and a bus inter.
    상세보기
  6. Ashmore, Paul Andrew; Davies, Ian Robert; Maine, Gene; Vedder, Rex Weldon, Certified memory-to-memory data transfer between active-active raid controllers.
    상세보기
  7. Biran, Giora; Drehmel, Robert Allen; Horton, Robert Spencer; Kautzman, Mark E.; Kuesel, Jamie Randall; Lin, Ming-i Mark; Mejdrich, Eric Oliver; Ogilvie, Clarence Rosser; Woodruff, Charles S., Computer system bus bridge.
    상세보기
  8. Biran,Giora; Drehmel,Robert Allen; Horton,Robert Spencer; Kautzman,Mark E.; Kuesel,Jamie Randall; Lin,Ming i Mark; Mejdrich,Eric Oliver; Ogilvie,Clarence Rosser; Woodruff,Charles S., Computer system bus bridge.
    상세보기
  9. White, Sean T.; Owen, Jonathan Mercer, Control of PCI memory read behavior using memory read alias and memory command reissue bits.
    상세보기
  10. Yousefi, Nariman; Kim, Yongbum; Walley, John; Chen, Sherman Xuemin; Diab, Wael W.; Ilyadis, Nicholas, Data bridge.
    상세보기
  11. Teranuma,Tadashi; Hasegawa,Hironobu; Nishiyama,Kunihiko; Tsuchihashi,Yoshihiko, Data processor.
    상세보기
  12. Lin, Liang-i, Data-burst-count-base receive FIFO control design and early packet discard for DMA optimization.
    상세보기
  13. Schmuck, Frank B.; Wyllie, James C., Detecting when to prefetch data and then prefetching data in parallel.
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  14. Schmuck, Frank B.; Wyllie, James C., Detecting when to prefetch inodes and then prefetching inodes in parallel.
    상세보기
  15. Schmuck,Frank B.; Wyllie,James C., Detecting when to prefetch inodes and then prefetching inodes in parallel.
    상세보기
  16. Chen,Baohua; Wong,Kimchung Arthur; Zhou,Zhinan, Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths.
    상세보기
  17. Srinivasan,Udayakumar; Kumar,Sampath Hosahally; Mattur,Dattatri N.; Rao,Madhu; Bhorkar,Abhay Ujwal, Intelligent PCI bridging consisting of prefetching data based upon descriptor data.
    상세보기
  18. Dastidar,Jaideep; Hensley,Ryan J.; Ruhovets,Michael; Lam,An H., Inter-queue ordering mechanism.
    상세보기
  19. Hepner,David Frank; Moy,Andrew; Wall,Andrew Dale, Memory prefetch method and system.
    상세보기
  20. Coldewey, Dirk, Method and apparatus for prefetching recursive data structures.
    상세보기
  21. Ogilvie,Clarence R.; Woodruff,Charles S., Method and system for controlling forwarding or terminating of a request at a bus interface based on buffer availability.
    상세보기
  22. Davies, Ian Robert; Pecone, Victor Key, Method for adopting an orphan I/O port in a redundant storage controller.
    상세보기
  23. Davies,Ian Robert; Maine,Gene; Vedder,Rex Weldon, Method for efficient inter-processor communication in an active-active RAID system using PCI-express links.
    상세보기
  24. Moy, Andrew, Method, system, and program for processing transaction requests during a pendency of a delayed read request in a system including a bus, a target device and devices capable of accessing the target de.
    상세보기
  25. Asaro, Anthony, Methods and apparatus for translating write request messages in a computing system.
    상세보기
  26. Vo,Hahn, Methods and apparatus used to retrieve data from memory before such data is requested.
    상세보기
  27. Walker,William J.; Olsen,Andy, Methods and apparatus used to retrieve data from memory into a RAM controller before such data is requested.
    상세보기
  28. Miyoshi, Takashi; Larson, Jeffrey D.; Sugahara, Hirohide; Horie, Takeshi, PCI bridge over network.
    상세보기
  29. Drehmel,Robert Allen; Ogilvie,Clarence Rosser; Woodruff,Charles S., Pipeline bit handling circuit and method for a bus bridge.
    상세보기
  30. Ashmore,Paul Andrew; Davies,Ian Robert; Maine,Gene, RAID system for performing efficient mirrored posted-write operations.
    상세보기
  31. Ashmore, Paul Andrew, Redundant storage controller system with enhanced failure analysis capability.
    상세보기
  32. Davies, Ian Robert, Safe message transfers on PCI-Express link from RAID controller to receiver-programmable window of partner RAID controller CPU memory.
    상세보기
  33. Wu, Stephen W., System and method for providing a pre-fetch memory controller.
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  34. Davies, Ian Robert, System and method for sharing SATA drives in active-active RAID controller system.
    상세보기
  35. Batchelor, Gary William; Benhase, Michael Thomas, Tracking and control of prefetch data in a PCI bus system.
    상세보기
  36. Ogilvie,Clarence Rosser; Woodruff,Charles S., Transaction flow control mechanism for a bus bridge.
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