초록 ▼

A composite layer of dielectric material is first formed over the integrated circuit structure, comprising a thin barrier layer of dielectric material, a layer of low k dielectric material over the barrier layer, and a thin capping layer of dielectric material over the layer of low k dielectric mate

A composite layer of dielectric material is first formed over the integrated circuit structure, comprising a thin barrier layer of dielectric material, a layer of low k dielectric material over the barrier layer, and a thin capping layer of dielectric material over the layer of low k dielectric material. A photoresist mask, formed over the capping layer, is baked in the presence of UV light to cross-link the mask material. The composite layer is then etched through the resist mask using an etchant gas mixture including CO, but not oxygen. Newly exposed surfaces of low k dielectric material are then optionally densified to harden them. The resist mask is then removed using a plasma of a neutral or reducing gas. Exposed surfaces of low k dielectric material are then passivated by a low power oxygen plasma. Preferably, optional densification, mask removal, and passivation are all done in the same vacuum apparatus. The substrate is then solvent cleaned to remove etch residues and then annealed to degasify the low k dielectric material. The substrate is then RF cleaned and a thin layer of PVD titanium is then formed in the same chamber over the surfaces of the openings. CVD titanium nitride is then formed over the titanium in the same vacuum apparatus. The coated openings are then filled with aluminum, tungsten, or copper.

대표청구항 ▼

A composite layer of dielectric material is first formed over the integrated circuit structure, comprising a thin barrier layer of dielectric material, a layer of low k dielectric material over the barrier layer, and a thin capping layer of dielectric material over the layer of low k dielectric mate

A composite layer of dielectric material is first formed over the integrated circuit structure, comprising a thin barrier layer of dielectric material, a layer of low k dielectric material over the barrier layer, and a thin capping layer of dielectric material over the layer of low k dielectric material. A photoresist mask, formed over the capping layer, is baked in the presence of UV light to cross-link the mask material. The composite layer is then etched through the resist mask using an etchant gas mixture including CO, but not oxygen. Newly exposed surfaces of low k dielectric material are then optionally densified to harden them. The resist mask is then removed using a plasma of a neutral or reducing gas. Exposed surfaces of low k dielectric material are then passivated by a low power oxygen plasma. Preferably, optional densification, mask removal, and passivation are all done in the same vacuum apparatus. The substrate is then solvent cleaned to remove etch residues and then annealed to degasify the low k dielectric material. The substrate is then RF cleaned and a thin layer of PVD titanium is then formed in the same chamber over the surfaces of the openings. CVD titanium nitride is then formed over the titanium in the same vacuum apparatus. The coated openings are then filled with aluminum, tungsten, or copper. GB-20000000635 (20000113); GB-20000000638 (20000113) nductor devices according to claim 1, wherein the plurality of processing chambers have one common load lock chamber. 8. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 1, wherein processing chambers are connected by gates such that wafers finishing one process in one processing chamber can be directly moved to another processing chamber for a subsequent process. 9. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 1, wherein the processing chambers have a vacuum pressure generator for forming vacuum pressure therein. 10. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 1, wherein the transfer mechanism comprises: a transfer arm for selectively holding the wafers; a transfer robot for loading and unloading the wafers into the processing chamber by moving the transfer arm; a horizontal driving part for moving the transfer robot horizontally; and a controller for controlling the transfer robot and the horizontal driving part by applying control signals thereto. 11. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 10, wherein the transfer mechanism further comprises a vertical driving part for moving the transfer robot vertically on receipt of a control signal from the controller. 12. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 11, wherein the vertical driving part comprises a motor or a pneumatic cylinder. 13. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 10, wherein the transfer arm is provided with a vacuum line so as to vacuum-suction the wafers. 14. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 10, wherein the transfer arm comprises a plurality of transfer arms which simultaneously transfer a plurality of wafers. 15. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 10, wherein the horizontal driving part comprises a motor or a pneumatic cylinder. 16. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 1, wherein the transfer path is extended and the transfer mechanism comprises a plurality of the transfer mechanisms installed so as to transfer wafers from one transfer mechanism to another. 17. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 1, wherein the transfer mechanism transfers unprocessed wafers from a cassette mounted on a first cassette stage to one of the processing chambers, and processed wafers from another of the processing chambers to a second cassette stage which is located such that the wafers are easily transferred to a subsequent process. 18. The multi-chamber system of an etching facility for manufacturing semiconductor devices of claim 1, wherein the transfer path has a rectangular shape. 19. A multi-chamber system of an etching facility for manufacturing semiconductor devices comprising: a cassette stage for mounting a cassette having wafers stacked thereon; a transfer path adjacent to the cassette stage for providing space for transportation of wafers, the transfer path being at atmospheric pressure and having a width slightly larger than a diameter of the wafers; a plurality of processing chambers aligned in a plurality of layers parallel to and adjoining the transfer path; a transfer mechanism capable of vertical/horizontal reciprocal movement installed in the transfer path for loading and unloading the wafers stacked on the cassette stage; and a load lock chamber directly connected to one side of the processing chambers, the load lock chamber serving as a stand-by area for the wafers. 20. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the transfer path has a rectangular shape. 21. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the plurality of layers of the processing chambers include 2 to 5 layers. 22. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the load lock chamber comprises: a transfer arm for receiving wafers from the transfer mechanism and transferring the wafers to the processing chambers; an inner transfer device for moving the transfer arm; and gates formed on a side of the transfer path and sides of the processing chambers, respectively, the gates being selectively opened and closed to allow passage of the wafers. 23. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 22, wherein the transfer arm comprises a plurality of transfer arms for simultaneously transferring a plurality of wafers. 24. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the transfer mechanism comprises: a transfer arm having a vacuum line so as to selectively vacuum-suction the wafers; a transfer robot for loading and unloading the wafers into the processing chamber by moving the transfer arm; a vertical driving part for moving the transfer robot vertically; a horizontal driving part for moving the transfer robot horizontally; and a controller for controlling the transfer robot, the vertical driving part, and the horizontal driving part by applying control signals thereto. 25. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 24, wherein the transfer arm comprises a plurality of the transfer arms which simultaneously transfer a plurality of wafers. 26. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 24, wherein the vertical driving part and the horizontal driving part each comprise a motor or a pneumatic cylinder. 27. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the transfer path is extended, and the transfer mechanism comprises a plurality of transfer mechanisms installed so as to transfer wafers from one transfer mechanism to another. 28. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 19, wherein the transfer mechanism transfers unprocessed wafers from a cassette mounted on a first cassette stage to one of the processing chambers, and processed wafers from another of the processing chambers to a second cassette stage which is located such that the wafers are easily transferred to a subsequent process. 29. A multi-chamber system of an etching facility for manufacturing semiconductor devices comprising: a first cassette stage for mounting a cassette having unprocessed wafers stacked thereon; a transfer path adjacent to the first cassette stage that provides space for transportation of wafers, the transfer path being at atmospheric pressure and having a width slightly larger than a diameter of the wafers; a plurality of processing chambers arranged in multi-layers and aligned in parallel adjoining the transfer path; a transfer mechanism capable of vertical/horizontal reciprocal movement installed in the transfer path for loading and unloading the wafers stacked on the first cassette stage; and a second cassette stage placed opposite to the first cassette stage and mounting thereon a cassette having processed wafers stacked thereon. 30. The multi-chamber system of an etching facility for manufacturing semiconductor devices according to claim 29, wherein the transfer mechanism comprises: a transfer arm having a vacuum line for selectively