Electrically shielded housing
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0659369
(2000-09-12)
|
발명자
/ 주소 |
- Collins, Peter Michael Frederick
- Thomason, Terry Dean
- Hausler, Ralph A.
|
출원인 / 주소 |
|
대리인 / 주소 |
Donovan, Paul F.Croll, Mark W.
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인용정보 |
피인용 횟수 :
1 인용 특허 :
10 |
초록
▼
An electrically shielded housing for an electrical device and method therefor having an insert member disposed in a cavity of a non-conductive housing body member. The insert member includes a conductive inner surface portion disposed adjacent an outer surface portion of the body member cavity. A no
An electrically shielded housing for an electrical device and method therefor having an insert member disposed in a cavity of a non-conductive housing body member. The insert member includes a conductive inner surface portion disposed adjacent an outer surface portion of the body member cavity. A non-conductive outer surface portion of the insert member forms a housing cavity for receiving an electrical device. The conductive inner surface portion of the insert member at least partially electrically shields the electrical device, and the non-conductive outer surface portion of the insert member insulates the electrical device from the conductive inner surface portion thereof.
대표청구항
▼
An electrically shielded housing for an electrical device and method therefor having an insert member disposed in a cavity of a non-conductive housing body member. The insert member includes a conductive inner surface portion disposed adjacent an outer surface portion of the body member cavity. A no
An electrically shielded housing for an electrical device and method therefor having an insert member disposed in a cavity of a non-conductive housing body member. The insert member includes a conductive inner surface portion disposed adjacent an outer surface portion of the body member cavity. A non-conductive outer surface portion of the insert member forms a housing cavity for receiving an electrical device. The conductive inner surface portion of the insert member at least partially electrically shields the electrical device, and the non-conductive outer surface portion of the insert member insulates the electrical device from the conductive inner surface portion thereof. from a telecommunications connector, the pins electrically connected with conductor springs within the telecommunications connector; a plurality of circuits positioned on the circuit board, each circuit electrically connecting an opening in the array of openings of the first mounting location with an opening in the array of openings of the second mounting location; each of the circuits positioned on the circuit board with no circuit crossing another circuit, each circuit being paired with another circuit, the circuits in each pair proximate to one another on the circuit board, and each pair of circuits spaced apart from each of the other pairs of circuits. 10. The circuit board of claim 9, wherein each circuit remains on the same layer from the opening in the first mounting location to the opening in the second mounting location. 11. The circuit board of claim 10, wherein each of the arrays of openings has eight openings; the openings at the first mounting location arranged into a lower row of four openings numbered sequentially 1, 3, 5 and 7, and an upper row of four openings offset from the lower row and numbered sequentially 2, 4, 6 and 8; the openings of the second mounting location arranged into an upper row of four openings numbered sequentially 1, 3, 5 and 7, and a lower row of four openings offset from the upper row and numbered sequentially 2, 4, 6 and 8; one of the circuits connecting each numbered opening of the first mounting location with the corresponding numbered opening of the second mounting location; and the circuit connecting openings 1 paired with the circuit connecting opening 2, the circuit connecting openings 3 paired with the circuit connecting openings 6, the circuit connecting openings 4 paired with the circuit connecting openings 5, and the circuit connecting openings 7 paired with the circuit connecting openings 8. 12. The circuit board of claim 11, wherein a first telecommunications jack is mounted at the first mounting location and a second telecommunications jack is mounted at the second mounting location. 13. The circuit board of claim 12, wherein the first and second telecommunications jacks are RJ-45 jacks. 14. The circuit board of claim 11, wherein the array of openings at the second mounting location is positioned in a configuration which is a mirror image to a configuration in which the array of openings in the first mounting location is positioned. 15. A circuit board comprising: at least two layers for receiving circuits; a first mounting location for receiving a first telecommunications connector on a first side of the circuit board and a second mounting location for receiving a second telecommunications connector on a second side of the circuit board; each mounting location including an array of openings for receiving and electrically connecting with pins extending from a telecommunications connector, the pins electrically connected with conductor springs within the telecommunications connector; a plurality of circuits on the circuit board, each circuit electrically connecting an opening in the array of openings of the first mounting location with an opening in the array of openings of the second mounting location; each of the circuits positioned on one of the layers of the circuit board with no circuit crossing another circuit on the same layer, each circuit being paired with another circuit on the same layer, and at least one of the pairs of circuits is located on a layer of the circuit board isolated from the remaining pairs; the circuits in each pair proximate to one another on the circuit board, and each pair of circuits spaced apart from other pairs of circuits on the same layer. 16. The circuit board of claim 15, wherein each circuit remains on the same layer from the opening in the first mounting location to the opening in the second mounting location. 17. The circuit board of claim 16, wherein each of the arrays of openings has eight openings; the openi
이 특허에 인용된 특허 (10)
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Courtney Daniel T. (Palmyra NY) Hermann Kenneth W. (Rochester NY) Miska Stanley R. (Pittsford NY), EMI shielding having flexible condustive sheet and I/O Gasket.
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Bootle John David, Electromagnetic shielding enclosure for electronic components.
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Mendolia Gregory S. ; Roderique Benjamin O. ; Droege David R., Gasketed shield can for shielding emissions of electromagnetic energy.
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Hansen David D. ; Woodbury Mark B. ; Chandler Virginia E. ; Monk David B. ; Miller ; II Harry W. ; Pratt Gerold W., High pressure resistant initiator with integral metal oxide varistor for electro-static discharge protection.
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Mok Henry W.C.,CAX ; Bailey Kevin J.,CAX ; Lindsay Paul A.,CAX ; Sheffield Robert C.,CAX ; Tencer Michal S.,CAX, Method of assembling an EMI shield around an electronic component.
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Dull Gary M. (1175 Sequoia Dr. Lewisville NC 27023) Caldwell William S. (1270 Yorkshire Rd. Winston-Salem NC 27106), Pyrimidinyl or Pyridinyl alkenyl amine compounds.
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Kuboshima Hidehiko (Shizuoka JPX) Hashizawa Shigemi (Shizuoka JPX) Inaba Shigemitsu (Shizuoka JPX), Shielded connector.
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Lax Ronald G. (Los Gatos CA) Johnson Robert G. (Santa Clara CA) Henningsen Charles G. (Portola Valley CA) Ellis J. Scott (San Jose CA), Shielded connector and method of forming same.
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Alexander Arthur R. (Valley Center CA), Side plated electromagnetic interference shield strip for a printed circuit board.
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Hashizawa Shigemi (Shizuoka JPX) Inaba Shigemitsu (Shizuoka JPX), Structure for connecting shielded-cable end.
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