초록 ▼

An air-decant device for the aeration and decanting of liquids stored in containers, comprising a pump which can pump air through the device to the liquid in the container and/or pump liquid from the container over an exposed surface or through a special nozzle to create a dome shaped flow of liquid

An air-decant device for the aeration and decanting of liquids stored in containers, comprising a pump which can pump air through the device to the liquid in the container and/or pump liquid from the container over an exposed surface or through a special nozzle to create a dome shaped flow of liquid to aerate the liquid before returning it to the container. In addition, the pump can pump liquid from the device via decanting attachment to decant the same to another container.

대표청구항 ▼

An air-decant device for the aeration and decanting of liquids stored in containers, comprising a pump which can pump air through the device to the liquid in the container and/or pump liquid from the container over an exposed surface or through a special nozzle to create a dome shaped flow of liquid

An air-decant device for the aeration and decanting of liquids stored in containers, comprising a pump which can pump air through the device to the liquid in the container and/or pump liquid from the container over an exposed surface or through a special nozzle to create a dome shaped flow of liquid to aerate the liquid before returning it to the container. In addition, the pump can pump liquid from the device via decanting attachment to decant the same to another container. S transistors having first and second gate terminals, respectively, connected to the ripple rejection circuit and receiving the second control signal therefrom, wherein the first and second MOS transistors provide the first and second currents to the first and second circuit branches, respectively, according to the second control signal. 7. The bandgap circuit of claim 6, wherein the first and second MOS transistors comprise PMOS transistors. 8. The bandgap circuit of claim 1, wherein the ripple rejection circuit comprises third and fourth MOS transistors providing the second control signal representative of the difference between the supply voltage and the first control signal. 9. The bandgap circuit of claim 8, wherein the third MOS transistor comprises a drain terminal connected to the supply voltage, a gate terminal connected to the supply voltage, and a source terminal connected to the mirroring circuit, and wherein the fourth MOS transistor comprises a drain terminal connected to the source terminal of the third MOS transistor, a gate terminal connected to the amplifier output terminal, and a source terminal connected to the ground. 10. The bandgap circuit of claim 9, wherein the third and fourth MOS transistors comprise NMOS transistors. 11. The bandgap circuit of claim 8, wherein the first circuit branch comprises first and second resistors, the first resistor being connected between the first input voltage node and the input circuit, and the second resistor being connected between the first input voltage node and the reference voltage node, and wherein the second circuit branch comprises a third resistor connected between the mirroring circuit and the second input voltage node. 12. The bandgap circuit of claim 8, wherein the mirroring circuit comprises first and second MOS transistors connected to the first and second circuit branches, respectively, the first and second MOS transistors having first and second gate terminals, respectively, connected to the ripple rejection circuit and receiving the second control signal therefrom, wherein the first and second MOS transistors provide the first and second currents to the first and second circuit branches, respectively, according to the second control signal. 13. The bandgap circuit of claim 12, wherein the input circuit comprises first and second diode-connected bipolar transistors connected in the first and second circuit branches, respectively, wherein the amplifier comprises an op-amp, the first input terminal being an inverting input and the second input terminal being a non-inverting input, wherein the first and second MOS transistors comprise PMOS transistors, and wherein the third and fourth MOS transistors comprise NMOS transistors. 14. The bandgap circuit of claim 12, wherein the third MOS transistor comprises a drain terminal connected to the supply voltage, a gate terminal connected to the supply voltage, and a source terminal connected to the mirroring circuit, and wherein the fourth MOS transistor comprises a drain terminal connected to the source terminal of the third MOS transistor, a gate terminal connected to the amplifier output terminal, and a source terminal connected to the ground. 15. A system for reducing output ripple voltages in a bandgap voltage reference circuit, comprising: a first MOS transistor comprising: a first drain terminal connected to a supply voltage in the bandgap voltage reference circuit, a first gate terminal connected to the supply voltage, and a first source terminal providing a control signal to a mirroring circuit in the bandgap voltage reference circuit; and a second MOS transistor comprising: a second drain terminal connected to the first source terminal of the first MOS transistor, a second gate terminal connected to an amplifier in the bandgap voltage reference circuit and receiving an amplifier signal representative of a difference between first and second bandgap voltages in the bandgap voltage reference cir