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A signal processing apparatus having: a plurality of circuit blocks each circuit block including a signal source and an output transistor adapted to receive a signal generated by the signal source at a control electrode region and output a corresponding signal from a main electrode region; and an an

A signal processing apparatus having: a plurality of circuit blocks each circuit block including a signal source and an output transistor adapted to receive a signal generated by the signal source at a control electrode region and output a corresponding signal from a main electrode region; and an analog/digital converter circuit adapted to sequentially process the signal from each of the plurality of circuit blocks, wherein the analog/digital converter circuit includes a reference transistor for receiving a reference level at a control electrode region and outputting a corresponding signal from a main electrode region and a digital output circuit for outputting a digital signal in accordance with a signal output from the output transistor and a signal output from the reference transistor, and wherein the output transistor and reference transistor constitute an input unit of a differential amplifier circuit including the output transistor and reference transistor.

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A signal processing apparatus having: a plurality of circuit blocks each circuit block including a signal source and an output transistor adapted to receive a signal generated by the signal source at a control electrode region and output a corresponding signal from a main electrode region; and an an

A signal processing apparatus having: a plurality of circuit blocks each circuit block including a signal source and an output transistor adapted to receive a signal generated by the signal source at a control electrode region and output a corresponding signal from a main electrode region; and an analog/digital converter circuit adapted to sequentially process the signal from each of the plurality of circuit blocks, wherein the analog/digital converter circuit includes a reference transistor for receiving a reference level at a control electrode region and outputting a corresponding signal from a main electrode region and a digital output circuit for outputting a digital signal in accordance with a signal output from the output transistor and a signal output from the reference transistor, and wherein the output transistor and reference transistor constitute an input unit of a differential amplifier circuit including the output transistor and reference transistor. ta et al., 521/079; US-4717776, 19880100, Brackenridge et al., 568/637; US-RE32606, 19880200, Stepniczka, 568/779; US-4740629, 19880400, Brackenridge et al., 568/639; US-4741864, 19880500, Avakian et al., 252/609; US-4751260, 19880600, Kress et al., 524/130; US-4778933, 19881000, McKinnie et al., 568/639; US-4814525, 19890300, Rule et al., 570/203; US-4849547, 19890700, Stollar et al., 568/639; US-4865880, 19890900, Silbermann et al., 427/160; US-4871882, 19891000, Stollar et al., 568/639; US-4925994, 19900500, Mais et al., 570/210; US-4983781, 19910100, Desmurs et al., 570/210; US-4990707, 19910200, Mais et al., 570/210; US-5003117, 19910300, Hussain, 570/210; US-5008477, 19910400, Hussain, 570/208; US-5030778, 19910700, Ransford, 570/208; US-5036126, 19910700, Rinehart et al., 524/141; US-5039729, 19910800, Brackenridge et al., 524/412; US-5041687, 19910800, McKinnie et al., 568/592; US-5053447, 19911000, Hussain, 524/412; US-5055235, 19911000, Brackenridge et al., 570/206; US-5059650, 19911000, Goettsch et al., 524/412; US-5077334, 19911200, Hussain, 524/469; US-5124496, 19920600, Templeton et al., 570/210; US-5218017, 19930600, Doucet et al., 523/351; US-5302768, 19940400, Hussain, 570/185; US-5324874, 19940600, Ransford et al., 570/208