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Systems and methods for building a platform specific compiler in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features of a particular hardware platform dependent compiler are provided.

Systems and methods for building a platform specific compiler in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features of a particular hardware platform dependent compiler are provided. The descriptors are converted into the platform dependent compiler source code which is compiled into platform dependent compiler object code. The platform specific compiler is formed from the platform dependent compiler object code and platform independent compiler object code already provide. During compiler run time an interface mediates the flow of information between the platform dependent compiler object code and the platform independent compiler object code.

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Systems and methods for building a platform specific compiler in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features of a particular hardware platform dependent compiler are provided.

Systems and methods for building a platform specific compiler in a multi-platform environment are provided. A set of user defined platform dependent compiler architecture descriptors that describe corresponding architectural features of a particular hardware platform dependent compiler are provided. The descriptors are converted into the platform dependent compiler source code which is compiled into platform dependent compiler object code. The platform specific compiler is formed from the platform dependent compiler object code and platform independent compiler object code already provide. During compiler run time an interface mediates the flow of information between the platform dependent compiler object code and the platform independent compiler object code. after the insertion of p parity bits into the (m-p) bit codeword, regardless of the value of each of the p parity bits, the resulting m-bit codeword has no more than j+1 consecutive ones beginning from an odd numbered bit, (g) wherein after the insertion of p parity bits into the (m-p) bit codeword, regardless of the value of each of the p parity bits, the resulting m-bit codeword has consecutive zeros in a row beginning from either end, such that x>0; (h) wherein after the insertion of p parity bits into the (m-p) bit codeword, regardless of the value of each of the p parity bits, the resulting m-bit codeword has at most y consecutive zeros anywhere in the (m-p) bit codeword, such that y>x; and (i) wherein after the insertion of p parity bits into the (m-p) bit codeword, regardless of the value of each of the p parity bits, the resulting m-bit codeword is 1+D precode decoded such the that the minimum number of 1's in the m-bit codeword is z, such that z>0. 2. The method as in claim 1, wherein x=8, y=11 and z=4. 3. The method as in claim 1 wherein the consecutive transition limit j is 3. 4. The method as in claim 1 wherein the length of the dataword n is 16. 5. The method as in claim 1, wherein the length of the n-bit data word n is 16, the length of the m-bit code word mn is 18, the number of parity bit per code word p is 1, the consecutive transition limit j is 3, and a 17-bit codeword is produced in response to each 16-bit dataword sequentially, each 17-bit codeword selected from 217possible 17-bit codewords in accordance with a set of conditions including: after the one parity bit is inserted into a 17 bit codeword, regardless of the value of the parity bit, the resulting 18-bit codeword having no more than 3 consecutive transitions beginning from an even-numbered sample period of the 17-bit dataword; after the one parity bit is inserted into a 17 bit code word, regardless of the value of the parity bit, the resulting 18-bit codeword having no more than 4 consecutive transitions beginning from an odd-numbered sample period of the 17 bit data word; after the one parity bit is inserted, regardless of the value of the parity bit, the resulting 18-bit code-word having no more than eight consecutive bits without a transition beginning from either end of the 18-bit codeword; after the one parity bit is inserted, regardless of the value of the parity bit, the resulting 18-bit code word having no more than eleven consecutive bits without a transition anywhere in the 18-bit codeword; after the one parity bit is inserted, regardless of the value of the parity bit, the minimum number of bits with NRZ values of 1 in the 18-bit codeword is four. 6. The method as in claim 1, further comprising substituting bits in the sequence of (m-p)-bit codewords near boundary of two (m-p)-bit codewords where there are more than j consecutive transitions beginning from an even-numbered sample period of one of the two (m-p)-bit codewords and spanning across the boundary of the two (m-p)-bit codewords in the sequence of (m-p)-bit codewords in the recorded waveform. 7. The method as in claim 1, further comprising substituting bits in the sequence of (m-p) codewords near boundary of two (m-p)-bit codewords where there are more than j+1 consecutive transitions beginning from an odd-numbered sample period of one of the two (m-p)-bit codewords and spanning across the boundary of the two (m-p)-bit codewords in the sequence of (m-p)-bit codewords in the recorded waveform. 8. The method as in claim 1, wherein the length of the n-bit data word n is 16, the length of the m-bit code word m is 18, the number of parity bit per code word p is 1, the consecutive transition limit j is 3, and inserting one check bit into each 17-bit codeword in the sequence of 17-bit codewords to produce a sequence of 18-bit codewords include grouping the sequence of 17-bit codewords in pairs, producing a sequence of 34-bit codewords, each 34-bit codeword con