초록 ▼

A three-dimensional imaging range finder is disclosed using a transmitted pulse reflected from a target. The range finder includes a pixel sensor for receiving light from the target and the reflected pulse. A global counter is provided for determining a time-of-flight value of the transmitted pulse

A three-dimensional imaging range finder is disclosed using a transmitted pulse reflected from a target. The range finder includes a pixel sensor for receiving light from the target and the reflected pulse. A global counter is provided for determining a time-of-flight value of the transmitted pulse by providing accurate count data to pixel memories. A processing circuit, which is coupled to the pixel sensor and the global counter, extracts the reflected pulse received by the pixel sensor, and stores the time-of-flight value upon extracting the reflected pulse. The pixel sensor provides a luminance signal and the processing circuit includes a high pass filter to extract the reflected pulse from the luminance signal.

대표청구항 ▼

A three-dimensional imaging range finder is disclosed using a transmitted pulse reflected from a target. The range finder includes a pixel sensor for receiving light from the target and the reflected pulse. A global counter is provided for determining a time-of-flight value of the transmitted pulse

A three-dimensional imaging range finder is disclosed using a transmitted pulse reflected from a target. The range finder includes a pixel sensor for receiving light from the target and the reflected pulse. A global counter is provided for determining a time-of-flight value of the transmitted pulse by providing accurate count data to pixel memories. A processing circuit, which is coupled to the pixel sensor and the global counter, extracts the reflected pulse received by the pixel sensor, and stores the time-of-flight value upon extracting the reflected pulse. The pixel sensor provides a luminance signal and the processing circuit includes a high pass filter to extract the reflected pulse from the luminance signal. e drain of the first PMOS transistor to the gate of the first PMOS transistor when the band-gap reference circuit is in a first state; and a first second-state switch operable to couple the drain of the third PMOS transistor to the gate of the third PMOS transistor when the band-gap reference circuit is in a second state. 9. The band-gap reference circuit of claim 8, further comprising: a fifth PMOS transistor having a source coupled to the power supply; a first resistor coupled to the fifth PMOS transistor; a first diode coupled to the first resistor and to ground; a second first-state switch operable to couple the drain of the fifth PMOS transistor to a first level shifter when the band-gap reference circuit is in the first state; a second second-state switch operable to couple the diode to the first level shifter when the band-gap reference circuit is in the second state; a third second-state switch operable to couple the gate of the fifth PMOS transistor to the drain of the first PMOS transistor when the band-gap reference circuit is in the second state; a sixth PMOS transistor having a source coupled to the power supply and a gate coupled to a gate of the fifth PMOS transistor; a second resistor coupled to the sixth PMOS transistor; a second diode coupled to the second resistor and to ground; a fourth second-state switch operable to couple the drain of the sixth PMOS transistor to a second level shifter when the band-gap reference circuit is in the second state; a third first-state switch operable to couple the diode to the second level shifter when the band-gap reference circuit is in the first state; and a fourth first-state switch operable to couple the gate of the sixth PMOS transistor to the drain of the third PMOS transistor when the band-gap reference circuit is in the first state. 10. The band-gap reference circuit of claim 9, further comprising: a third resistor coupled to the drain of the fifth PMOS transistor; a fourth resistor; a fifth second-state switch operable to couple the fourth resistor to the third resistor when the band-gap reference circuit is in the second state; a fifth resistor coupled to the drain of the sixth PMOS transistor; a sixth resistor; a fifth first-state switch operable to couple the sixth resistor to the fifth resistor when the band-gap reference circuit is in the first state; and a capacitor coupled to the fourth resistor and the sixth resistor and to ground. 11. The band-gap reference circuit of claim 10, further comprising: a seventh PMOS transistor having a source coupled to the power supply and a gate coupled to the gate of the fifth PMOS transistor and the gate of the sixth PMOS transistor; a sixth first-state switch operable to couple a drain of the seventh PMOS transistor to the third resistor when the band-gap reference circuit is in the first state; and a sixth second-state switch operable to couple the drain of the seventh PMOS transistor to the fifth resistor when the band-gap reference circuit is in the second state. 12. The band-gap reference circuit of claim 11, the first resistor, the second resistor, the third resistor and the fifth resistor comprising about 10 kΩ of resistance, the fourth resistor and the sixth resistor comprising about 40 kΩ of resistance, and the capacitor comprising about 40 pF of capacitance. 13. The band-gap reference circuit of claim 11, the specified duty cycle comprising about 50%. 14. A transceiver, comprising: a digital-to-analog converter operable to receive a digital output signal and to generate an analog output signal based on the digital output signal; a voltage-to-current converter coupled to the digital-to-analog converter, the voltage-to-current converter operable to receive a reference voltage, to generate a specified current based on the reference voltage, and to provide the specified current to the digital-to-analog converter; a band-gap reference circuit coupled to the voltage-to-curren