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Two-stage transfer molding method to encapsulate MMC module 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
출원번호 US-0092216 (2002-03-05)
발명자 / 주소
  • Bolken, Todd O.
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    TraskBritt
인용정보 피인용 횟수 : 13  인용 특허 : 55

초록

A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the card circuit to the circuit of another apparatus by removable insertion therein. The substrate is defined

대표청구항

A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the card circuit to the circuit of another apparatus by removable insertion therein. The substrate is defined

이 특허에 인용된 특허 (55)

  1. Chou C. H. (Taipei TWX) Wang T. H. (Taipei Hsien TWX) Chen C. S. (Taipei Hsien TWX), Air exhaust mold plunger.
  2. Liang Louis H. (Los Altos CA), Apparatus for thermally coupling a heat sink to a leadframe.
  3. Courtenay Robert ; Brooks Jerry M., Coated semiconductor die/leadframe assembly and method for coating the assembly.
  4. Farnworth Warren M. (Nampa ID) Smith Rockwell D. (Boise ID) Moden Walter L. (Boise ID), Dissimilar adhesive die attach for semiconductor devices.
  5. Mehr Behrooz (Tempe AZ), Drop-in heat sink.
  6. Moscicki Jean-Pierre (Saint Egreve FRX), Heat sink for plastic casings.
  7. Combs Edward G. (Foster City CA), High power dissipation plastic encapsulated package for integrated circuit die.
  8. Murakami Yoji (Fukushima JPX), Method and apparatus for transfer molding.
  9. Akram Salman ; Wark James M., Method and apparatus for underfill of bumped or raised die.
  10. Farnworth Warren M. (Nampa ID) Shrock Ed A. (Boise ID) Clifford Scott (Boise ID) King Jerrold L. (Boise ID) Moden Walter (Boise ID), Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer.
  11. Golwalkar Suresh V. (Folsom CA) Foehringer Richard (Fair Oaks CA) Wentling Michael (Cameron Park CA) Takatsuki Ryo (Ibaraki JPX) Kawashima Shigeo (Kitakyusyu JPX), Method for constructing a dual sided, wire bonded integrated circuit chip package.
  12. Hashemi Seyed H. (Austin TX) Olla Michael A. (Austin TX) Dolbear Thomas P. (Austin TX) Nelson Richard D. (Austin TX), Method for encapsulating an integrated circuit using a removable heatsink support block.
  13. Sera, Michitoshi, Method for encapsulating semiconductor devices.
  14. Shin Won Sun,KRX, Method for fabricating a heat sink-integrated semiconductor package.
  15. Odashima Teikou,JPX ; Matsui Mikio,JPX ; Sugizaki Yoshiaki,JPX ; Nakazawa Takahito,JPX, Method for manufacturing semiconductor device and apparatus for resin-encapsulating.
  16. Wensel Richard W., Method for transfer molding encapsulation of a semiconductor die with attached heat sink.
  17. Lee Sang S. (Sunnyvale CA), Method of forming molded plastic packages with integrated heat sinks.
  18. Ozawa Takashi (Kawasaki JPX) Sorimachi Haruo (Kawasaki JPX), Method of making a multi-chip module having an improved heat dissipation efficiency.
  19. Otsuki Tetsuya,JPX, Method of making a multiple heat sink resin sealing type semiconductor device.
  20. Ishida Yoshihiro (Tokorozawa JPX) Komatsu Katsuji (Kawagoe JPX) Mimura Seiichi (Kawagoe JPX) Takenouchi Kikuo (Higashimurayama JPX) Yabe Isao (Tokorozawa JPX) Ichikawa Shingo (Sayama JPX) Shimada Yos, Method of making a resin encapsulated pin grid array with integral heatsink.
  21. Juskey Frank J. (Coral Springs FL) Bernardoni Lonnie L. (Coral Springs FL) Freyman Bruce J. (Plantation FL) Suppelsa Anthony B. (Coral Springs FL), Method of making a transfer molded semiconductor device.
  22. Kim Jong Tae,KRX ; Park Chau Ik,KRX ITX 369-820 ; Lee Chang Hyung,KRX, Method of making an air tight cavity in an assembly package.
  23. Palmer Clarence K. (Polo IL), Method of making sealed housings containing delicate structures.
  24. Nakagawa Osamu (Itami JPX) Yanagitani Koji (Itami JPX) Sasaki Ikuo (Itami JPX) Banjo Toshinobu (Itami JPX), Method of molding a semiconductor device.
  25. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Method of resin encapsulating a semiconductor device.
  26. Nakagawa Osamu (c/o Mitsubishi Denki Kabushiki Kaisha ; Kitaitami Seisakusho ; No. 1 ; Mizuhara 4-chome Itami-shi ; Hyogo-ken JPX) Yanagitani Koji (c/o Mitsubishi Denki Kabushiki Kaisha ; Kitaitami S, Mold for molding semiconductor devices.
  27. Tsutsumi Yasutsugu (Fukuoka JPX) Tanaka Sueyoshi (Fukuoka JPX), Mold for resin-sealing a semiconductor device.
  28. Fukushima Yuichi (Saitama JPX) Kobayashi Fujio (Kanagawa JPX) Takahashi Shinichiro (Tokyo JPX), Mold for transfer molding.
  29. Mahulikar Deepak (Madison CT) Braden Jeffrey S. (Livermore CA) Chen Szuchain F. (Orange CT), Molded plastic semiconductor package including an aluminum alloy heat spreader.
  30. Ozawa Takashi (Kawasaki JPX), Multi-chip module having an improved heat dissipation efficiency.
  31. Chan Min Y (Singapore SGX) Low Siu W. (Singapore SGX), Multi-layered lead frame assembly for integrated circuits.
  32. Obara Shoji (Fukuoka JPX), Multiple transfer molding die.
  33. Pashby Richard P. (Williston VT) Phelps ; Jr. Douglas W. (Burlington VT) Samuelsen Sigvart J. (Burlington VT) Ward William C. (Burlington VT), Package semiconductor chip.
  34. Akram Salman ; Wark James M., Packaged die PCB with heat sink encapsulant.
  35. Michii Kazunari (Itami JPX), Packaged semiconductor device having tab tape and particular power distribution lead structure.
  36. Hazama Keiji (Shimodate JPX) Maeda Yo (Yuki JPX) Ohta Shinichi (Shimodate JPX), Packaging process for semiconductors.
  37. Hamburgen William R. (Palo Alto CA) Fitch John S. (Newark CA) Dordi Yezdi N. (Cambridge MA), Paddleless molded plastic semiconductor chip package.
  38. Wakefield Gene F. (Plano TX), Plastic packaging of microelectronic circuit devices.
  39. Gupta Amitava (San Marino CA) Blum Ronald D. (Roanoke VA), Polymerizable resin for forming clear, hard plastics.
  40. Hirbour Louis J. (Yorba Linda CA) Schlenker Heinz W. (Northridge CA) Fadgen ; Jr. Earl J. (East Greenwich RI), Process and solutions for removing resin bleed from electronic components.
  41. Moeller Werner (Ulm DEX) von Luettichau Harald (Kirchheim-Oetlingen DEX), Process for encapsulating microelectronic semi-conductor and layer type circuits.
  42. Otsuki Tetsuya,JPX, Resin sealing type semiconductor device.
  43. Tomita Yoshihiro (Itami JPX) Abe Shunichi (Itami JPX), Resin-packaged semiconductor device with flow prevention dimples.
  44. Kozono Hiroyuki,JPX, Resin-sealed semiconductor device.
  45. Sakuta Toshiyuki (Hamura JPX) Miyazawa Kazuyuki (Iruma JPX) Oguchi Satoshi (Ohme JPX) Kaneda Aizo (Yokohama JPX) Mitani Masao (Yokohama JPX) Nakamura Shozo (Yokohama JPX) Nishi Kunihiko (Kokubunji JP, Semiconductor device.
  46. Kubota Akihiro (Kawasaki JPX) Sugiura Rikio (Sagamihara JPX) Aoki Tsuyoshi (Kawasaki JPX) Ono Michio (Tokyo JPX), Semiconductor device and a method for fabricating the same.
  47. Nakajima Hirofumi,JPX, Semiconductor device capable of accomplishing a high moisture proof.
  48. Nakajima Hirofumi,JPX, Semiconductor device capable of accomplishing a high moisture proof.
  49. Ootsuki Tetsuya (Nagano-ken JPX), Semiconductor device having a heat radiator.
  50. Tomita Yoshihiro,JPX, Semiconductor device including a heat radiation plate.
  51. Casati Paolo,ITX ; Magni Pierangelo,ITX ; Marchisi Giuseppe,ITX, Semiconductor device package with metal-polymer joint of controlled roughness.
  52. Ootsuki Tetsuya (Nagano-ken JPX) Hama Norikata (Nagano-ken JPX), Semiconductor device with a convex heat sink.
  53. Lin Paul T. (Austin TX), Shielded liquid encapsulated semiconductor device and method for making the same.
  54. Burns Carmen D. (Austin TX) Roane Jerry (Austin TX) Cady James W. (Austin TX), Ultra high density integrated circuit packages.
  55. Burns Carmen D. (Austin TX) Cady James W. (Austin TX) Roane Jerry M. (Austin TX) Troetschel Phillip R. (Buda TX), Warp-resistent ultra-thin integrated circuit package fabrication method.

이 특허를 인용한 특허 (13)

  1. Jeon, Hyung Jun; Lee, Tae Keun; Kim, Sung Soo, Integrated circuit package system and method of manufacture thereof.
  2. Wang,Kuang Yu; Ni,Jim; Hsueh,Paul; Chiou,Ren Kang, Memory card production using prefabricated cover and molded casing portion.
  3. Liu,Sheng Tsung, Method for manufacturing ball grid array package.
  4. Bolken,Todd O., Method for two-stage transfer molding device to encapsulate MMC module.
  5. Bolken, Todd O.; Cobbley, Chad A., Techniques for packaging a multiple device component.
  6. Bolken,Todd O.; Cobbley,Chad A., Techniques for packaging a multiple device component.
  7. Bolken, Todd O.; Cobbley, Chad A., Techniques for packaging multiple device components.
  8. Bolken, Todd O.; Cobbley, Chad A., Techniques for packaging multiple device components.
  9. Bolken, Todd O.; Cobbley, Chad A., Techniques for packaging multiple device components.
  10. Bolken, Todd O.; Cobbley, Chad A., Techniques for packaging multiple device components.
  11. Bolken, Todd O., Two-stage transfer molding device to encapsulate MMC module.
  12. Bolken,Todd O., Two-stage transfer molding device to encapsulate MMC module.
  13. Bolken, Todd O., Two-stage transfer molding method to encapsulate MMC module.
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