초록 ▼

To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resistance metal and a refractory metal,

To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resistance metal and a refractory metal, and the wiring line is further protected with an anodized film. As a result, it is possible to form the wiring line having the low resistance and the high heat resistance and to form a contact with an upper line easily.

대표청구항 ▼

To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resistance metal and a refractory metal,

To provide a technique for manufacturing a wiring line having a low resistance and a high heat resistance so as to make an active matrix type display device larger and finer. The wiring line is constructed of a laminated structure of a refractory metal, a low resistance metal and a refractory metal, and the wiring line is further protected with an anodized film. As a result, it is possible to form the wiring line having the low resistance and the high heat resistance and to form a contact with an upper line easily. red to a lower surface of said semiconductor substrate. 10. A semiconductor device according to claim 9, wherein said planar circuit element is selected from the group consisting of a capacitor and a thin-film resistor. 11. A semiconductor device comprising: a semiconductor substrate having a circuit element formation region in which an integrated circuit is formed and a plurality of connection pads, said plurality of connection pads including: (i) at least one first connection pad connected to a first barrier layer through a first insulating film interposed therebetween, said barrier layer being coupled to a ground potential, and comprising a first conductor layer which covers the circuit element formation region and which is electrically connected to a first straight-shaped columnar electrode which is coupled to an outer circuit; (ii) at least one second connection pad connected to a thin-film circuit element provided on the first barrier layer through a second insulating film interposed therebetween, said thin-film circuit element comprising a passive element which is electrically connected to at least one second straight-shaped columnar electrode which is coupled to an outer circuit; (iii) at least one third connection pad connected to a second barrier layer on the thin-film circuit element through a third insulating film interposed therebetween, said second barrier layer being coupled to a ground potential, and comprising a second conductor layer which is electrically connected to at least one third straight-shaped columnar electrode which is coupled to an outer circuit; and (iv) at least one fourth connection pad electrically connected to a third conductor layer on the second barrier layer through a fourth insulating film interposed therebetween, said third conductor layer being connected to at least one fourth straight-shaped columnar electrode which is coupled to an outer circuit. 12. A semiconductor device according to claim 11, further comprising a sealing film provided on an entire upper surface of the semiconductor device excluding said first, second, third and fourth columnar electrodes. 13. A semiconductor device according to claim 11, wherein said thin-film circuit element is selected from the group consisting of a thin-film inductor, a thin-film transformer, a thin-film capacitor, a thin-film SAW (Surface Acoustic Wave) filter, a microstrip line, and a MMIC (Microwave Monolithic Integrated Circuit). 14. A semiconductor device according to claim 11, further comprising a planar circuit element having an electric function and adhered to a lower surface of said semiconductor substrate. 15. A semiconductor device according to claim 14, wherein said planar circuit element is selected from the group consisting of a thin-film capacitor and a thin-film resistor. uced. Related methods are also discussed.