초록 ▼

Methods of forming copper interconnects free from via-to-via leakage currents and having low resistances are disclosed. In a first aspect, a barrier layer is deposited on the first metal layer prior to copper oxide sputter-etching to prevent copper atoms from reaching the interlayer dielectric and f

Methods of forming copper interconnects free from via-to-via leakage currents and having low resistances are disclosed. In a first aspect, a barrier layer is deposited on the first metal layer prior to copper oxide sputter-etching to prevent copper atoms from reaching the interlayer dielectric and forming via-to-via leakage current paths therein. In a second aspect, a capping dielectric barrier layer is deposited over the first metal layer prior to sputter etching. During sputter-etching, the capping dielectric barrier layer redistributes on the sidewalls of the interlayer dielectric, preventing sputter-etched copper atoms from reaching the interlayer dielectric and forming via-to-via leakage paths therein. In a third aspect, both a capping dielectric barrier layer and a barrier layer are deposited over the first metal layer prior to sputter-etching to prevent copper atoms produced during sputter-etching from reaching the interlayer dielectric and forming via-to-via leakage paths therein.

대표청구항 ▼

1. A process for deposition of copper within a hole defined in a dielectric layer over a copper feature, comprising: depositing a barrier layer over the surfaces of the hole; exposing at least a portion of the copper feature by sputtering both the barrier layer and any copper oxide layer on at l

1. A process for deposition of copper within a hole defined in a dielectric layer over a copper feature, comprising: depositing a barrier layer over the surfaces of the hole; exposing at least a portion of the copper feature by sputtering both the barrier layer and any copper oxide layer on at least a portion of the copper feature, wherein depositing the barrier layer and exposing at least a portion of the copper feature occur simultaneously; and depositing a copper layer over the surfaces of the hole. 2. The process of claim 1 wherein depositing a barrier layer comprises depositing a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten and tungsten nitride. 3. The process of claim 1 wherein depositing a copper layer comprises depositing a copper seed layer. 4. The process of claim 3 further comprising performing a copper electroplating process to fill the hole with copper. 5. A process for deposition of a barrier layer within a via defined in a dielectric layer over a copper feature, comprising: depositing a barrier layer over the surfaces of the via; and exposing at least a portion of the copper feature by sputtering both the barrier layer and any copper oxide layer on at least a portion of the copper feature, wherein depositing the barrier layer and exposing at least a portion of the copper feature occur simultaneously. 6. The process of claim 5 wherein depositing a barrier layer comprises depositing a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten and tungsten nitride. 7. For a structure having a copper feature, a first dielectric layer formed over the copper feature and a second dielectric layer formed over the first dielectric layer, a process for deposition of copper within a hole defined in the second dielectric layer over the copper feature, comprising: depositing a barrier layer over the surfaces of the hole; exposing at least a portion of the copper feature by sputtering the barrier layer, the first dielectric layer and any copper oxide layer on at least a portion of the copper feature, wherein depositing the barrier layer and exposing at least a portion of the copper feature occur simultaneously; and depositing a copper layer over the surfaces of the hole. 8. The process of claim 7 wherein the first dielectric layer comprises silicon nitride. 9. The process of claim 8 wherein the second dielectric layer comprises silicon dioxide. 10. The process of claim 7 wherein depositing a barrier layer comprises depositing a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten and tungsten nitride. 11. The process of claim 7 wherein depositing a copper layer comprises depositing a copper seed layer. 12. The process of claim 11 further comprising performing a copper electroplating process to fill the hole with copper. 13. For a structure having a copper feature, a first dielectric layer formed over the copper feature and a second dielectric layer formed over the first dielectric layer, a process for deposition of a barrier layer within a via defined in the second dielectric layer over the copper feature, comprising: depositing a barrier layer over the surfaces of the via; and exposing at least a portion of the copper feature by sputtering the barrier layer, the first dielectric layer and any copper oxide layer on at least a portion of the copper feature, wherein depositing the barrier layer and exposing at least a portion of the copper feature occur simultaneously. 14. The process of claim 13 wherein the first dielectric layer comprises silicon nitride. 15. The process of claim 14 wherein the second dielectric layer comprises silicon dioxide. 16. The process of claim 13 wherein depositing a barrier layer comprises depositing a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten and tungsten nitride.