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Method for marking integrated circuits with a laser 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B23K-026/00
출원번호 US-0567950 (1995-12-06)
우선권정보 FR-0015151 (1994-12-09)
발명자 / 주소
  • Cadet, Bernard
출원인 / 주소
  • SGS-Thomson Microelectronics S.A.
대리인 / 주소
    Wolf, Greenfield & Sacks, P.C.
인용정보 피인용 횟수 : 25  인용 특허 : 9

초록

A method for physically marking, on silicon wafers, of integrated circuits deemed to be defective during a testing step, so as to modify the visual appearance of the surface of these circuits, wherein the marking is done by the exposure of the circuits to a laser beam. The disclosure also relates to

대표청구항

1. A method for physically marking, on a silicon wafer, a surface of an integrated circuit deemed to be defective during a testing step so as to modify a visual appearance of the surface, the method comprising steps of: identifying a defective integrated circuit; and marking the defective integr

이 특허에 인용된 특허 (9)

  1. Yokoyama Masanori (Chigasaki JPX), Apparatus for marking identification symbols on wafer.
  2. Bitler Joel R. (Allentown PA) Bodnar Michael W. (Macungie PA) Booth Raymond H. (Walnutport PA) Roman Daniel J. (Bethlehem PA) Schneider Fred J. (Northampton PA) Seitzer Philip W. (Bethlehem PA) Wilki, Article carrying a distinctive mark.
  3. Shils Alan J. (Yorktown Heights NY) Ianni ; Jr. John P. (Wappingers Falls NY), Laser written chip identification method.
  4. Duncan Hibbert A. (East Windsor NJ) Ehret Francis J. (North Whitehall Township ; Lehigh County PA) Kahn Sherwin R. (South Brunswick Township ; Middlesex County NJ) Kinney Karen H. (Lawrence Township , Method for automatically identifying semiconductor wafers.
  5. Nakamura Masakatsu (Itami JPX) Hieda Sayuki (Itami JPX), Method of laser-marking semiconductor devices.
  6. Kuhn-Kuhnenfeld Franz (Emmerting DEX) Kramler Josef (Burgkirchen DEX) Gerber Hans-Adolf (Burghausen DEX), Method of making reference surface markings on semiconductor wafers by laser beam.
  7. Spratte Hans-Hermann (Kirchheim-Teck DEX) Reindl Werner (Unterhaching DEX), Process for marking semiconductor surfaces.
  8. Hashimoto Kazuhiko (Tokyo JPX) Matsui Masataka (Tokyo JPX) Asoh Syoichi (Ooita JPX), Semiconductor device having identification region for carrying out failure analysis.
  9. Woelki Michael (Stow MA) Scaroni James H. (Somis CA), Writing on silicon wafers.

이 특허를 인용한 특허 (25)

  1. Lin, Mou-Shiung; Lee, Jin-Yuan, Chip packages having dual DMOS devices with power management integrated circuits.
  2. Lin, Mou-Shiung, Chip structure with a passive device and method for forming the same.
  3. Lin, Mou-Shiung, High performance system-on-chip inductor using post passivation process.
  4. Lin, Mou-Shing, High performance system-on-chip using post passivation process.
  5. Lin, Mou-Shiung, High performance system-on-chip using post passivation process.
  6. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  7. Lin,Mou Shiung, High performance system-on-chip using post passivation process.
  8. Grapov, Yuri; Stukalin, Felix; Nair, Nikhit, Laser cutting head with controllable collimator having movable lenses for controlling beam diameter and/or focal point location.
  9. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  10. Lin, Mou-Shiung; Lee, Jin-Yuan, Method for making high-performance RF integrated circuits.
  11. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection process and structures.
  12. Lin, Mou-Shiung; Chou, Chiu-Ming; Chou, Chien-Kang, Post passivation interconnection structures.
  13. Broadley, Scott T.; Silverman, Herbert P.; Chen, Ta-Yung; Ragsdale, Steven R., Reference electrode having a flowing liquid junction and filter members.
  14. Broadley, Scott T.; Silverman, Herbert P.; Chen, Ta-Yung; Ragsdale, Steven R., Reference electrode having a flowing liquid junction and filter members.
  15. Broadley,Scott T.; Ragsdale,Steven R.; Silverman,Herbert P., Reference electrode having a microfluidic flowing liquid junction.
  16. Broadley,Scott T.; Ragsdale,Steven R.; Silverman,Herbert P., Reference electrode having a microfluidic flowing liquid junction.
  17. Broadley,Scott T.; Ragsdale,Steven R.; Silverman,Herbert P., Reference electrode having a microfluidic flowing liquid junction.
  18. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  19. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  20. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  21. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  22. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  23. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  24. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
  25. Lin, Mou-Shiung; Wei, Gu-Yeon, Voltage regulator integrated with semiconductor chip.
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