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The present invention relates to a structure for installing a flat display device on an installation face. According to a conventional attaching structure, a complicated mechanism is required for a display unit and a fixing member thereof. Therefore, there has been a problem in that the weight and s

The present invention relates to a structure for installing a flat display device on an installation face. According to a conventional attaching structure, a complicated mechanism is required for a display unit and a fixing member thereof. Therefore, there has been a problem in that the weight and size of the whole device is increased. The flat display device according to the present invention comprises a display unit (1) having a projected portion (11) provided on a predetermined region of a rear face (1R) thereof, a body side fixing member (25) screwed to an upper face (113) of the projected portion (11), and an installation face side fixing member (26) screwed to an installation face (4). A projection (251) provided on an upper side end (25T1) of the body side fixing member (25) is inserted into a cut portion (261) provided on an upper side end (26T1) of the installation face side fixing member (26), and they are supported each other. Thus, the display unit (1) is installed on the installation face (4). Furthermore, the body side fixing member (25) and the installation face side fixing member (26) are fastened and fixed to each other with a screw (7) on both lower side end (25T2, 26T2) sides. The present invention is mainly applied to flat display devices for domestic and commercial use.

대표청구항 ▼

The present invention relates to a structure for installing a flat display device on an installation face. According to a conventional attaching structure, a complicated mechanism is required for a display unit and a fixing member thereof. Therefore, there has been a problem in that the weight and s

The present invention relates to a structure for installing a flat display device on an installation face. According to a conventional attaching structure, a complicated mechanism is required for a display unit and a fixing member thereof. Therefore, there has been a problem in that the weight and size of the whole device is increased. The flat display device according to the present invention comprises a display unit (1) having a projected portion (11) provided on a predetermined region of a rear face (1R) thereof, a body side fixing member (25) screwed to an upper face (113) of the projected portion (11), and an installation face side fixing member (26) screwed to an installation face (4). A projection (251) provided on an upper side end (25T1) of the body side fixing member (25) is inserted into a cut portion (261) provided on an upper side end (26T1) of the installation face side fixing member (26), and they are supported each other. Thus, the display unit (1) is installed on the installation face (4). Furthermore, the body side fixing member (25) and the installation face side fixing member (26) are fastened and fixed to each other with a screw (7) on both lower side end (25T2, 26T2) sides. The present invention is mainly applied to flat display devices for domestic and commercial use. ckmongathan et al., "A New Addressing Technique for Fast Responding STN LCDs", Japan Display '92, 1992 pp. 65-68. B. Clifton et al., "Hardware Architectures for Video-Rate, Active Addressed STN Displays", Japan Display '92, 1992 pp. 503-506. J. Nehring et al., "Ultimate Limits for Matrix Addressing of RMS-Responding Liquid-Crystal Displays", IEEE Transactions on Electron Devices, vol. ED-26, No. 5, May 1979, pp. 795-802. T. Ruckmongathan et al., "New Addressing Techniques for Multiplexed Liquid Crystal Displays", Proceedings of the SID, vol. 24/3, 1983, pp. 259-262. T. Ruckmongathan, "A Generalized Addressing Technique for RMS Responding Matrix LCDs", 1988 International Display Research Conference, IEEE, 1988, pp. 80-85. d by dividing an input video data into one for each sub-field and one for each line to calculate an average value of a bit data per line and then comparing the calculated average value with the predetermined reference value to use the compared difference value. 9. The line erasing method as claimed in claim 6, wherein detecting the load amount per line and controlling the erasure discharge are carried out at least one of high order sub-field set to have a high relative brightness ratio. 10. A line erasing method for a plasma display panel wherein a single frame is divided into a plurality of sub-fields, comprising: detecting a load amount for each of a desired number of lines for lines including a pair of electrodes for causing a sustaining discharge; and controlling an erasure discharge for erasing the sustaining discharge for each of the desired number of lines in accordance with a deviation in the load amount detected for each of the desired number of lines. 11. The line erasing method as claimed in claim 10, wherein controlling the erasure discharge further comprising: comparing the load amount detected for each of the number of lines with a predetermined reference value; delaying an application time of an erasing pulse into a time later than a predetermined reference time when the load amount detected for each of the desired number of lines is larger than the predetermined reference value; and advancing an application time of an erasing pulse into a time earlier than a predetermined reference time when the load amount detected for each of the desired number of lines is smaller than the predetermined reference value. 12. The line erasing method as claimed in claim 10, wherein the load amount for each of the desired number of lines is determined by dividing an input video data into one for each sub-field and one for each line to calculate an average value of a bit data per line and then comparing the calculated average value with the predetermined reference value to use the compared difference value. 13. The line erasing method as claimed in claim 10, wherein detecting the load amount for each of the desired number of lines and controlling the erasure discharge are carried out at least one of high order sub-field set to have a high relative brightness ratio. 14. A line erasing apparatus for a plasma display panel wherein a single frame is divided into a plurality of sub-fields, comprising: a load detector configured to detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; a controller configured to controlling the sustaining interval in accordance with a deviation in the load amount per line; and a sustaining interval adjustor configured to adjusting an application time of an erasing pulse for erasing the sustaining discharge. 15. The line erasing apparatus as claimed in claim 14, wherein the controller compares the detected load amount per line with a predetermined reference value to lengthen the sustaining interval when the detected load amount per line is larger than the predetermined reference value and shortens the sustaining interval when the detected load amount per line is smaller than the predetermined reference value. 16. The line erasing apparatus as claimed in claim 14, wherein the load detector divides an input video data into one for each sub-field and one for each line to calculate an average value of a bit data per line and then compares the calculated average value with the predetermined reference value, thereby detecting the load amount per line in accordance with the compared difference value. 17. The line erasing apparatus as claimed in claim 14, wherein the adjustor adjusts the sustaining interval for each line at a portion of the sub-fields. 18. The line erasing apparatus as claimed in claim 17, wherein the portion of the sub-fields is at least one of high order sub-field set to have a high relative brightness ratio. 19. A line erasing method for a plasma display panel wherein a single frame is divided into a plurality of sub-fields, comprising: a load detector configured to detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; and an erasure controller configured to controlling an erasure discharge for erasing the sustaining discharge for each line in accordance with a deviation in the load amount per line. 20. The line erasing apparatus as claimed in claim 19, wherein the erasure controller compares the detected load amount per line with a predetermined reference value to delay an application time of an erasing pulse into a time later than a predetermined reference time when the detected load amount per line is larger than the predetermined reference value and advances an application time of an erasing pulse into a time earlier than a predetermined reference time when the detected load amount per line is smaller than the predetermined reference value. 21. The line erasing apparatus as claimed in claim 19, wherein the load detector divides an input video data into one for each sub-field and one for each line to calculate an average value of a bit data per line and then compares the calculated average value with the predetermined reference value, thereby detecting the load amount per line in accordance with the compared difference value. 22. The line erasing apparatus as claimed in claim 19, wherein the erasure controller controls an application time of the erasing pulse at least one of high order sub-field set to have a high relative brightness ratio. 23. A line erasing method for a plasma display panel wherein a single frame is divided into a plurality of sub-fields, comprising: a load detector configured to detecting a load amount for each of a desired number of lines for lines including a pair of electrodes for causing a sustaining discharge; and an erasure controller configured to controlling an erasure discharge for erasing the sustaining discharge for each of the desired number of lines in accordance with a deviation in the load amount detected for each of the desired number of lines. 24. The line erasing apparatus as claimed in claim 23, wherein the erasure controller compares the load amount detected for each of the desired number of lines with a predetermined reference value to delay an application time of an erasing pulse into a time later than a predetermined reference time when the detected load amount detected for each of the desired number of lines is larger than the predetermined reference value and advances an application time of an erasing pulse into a time earlier than a predetermined reference time when the load amount detected for each of the desired number of lines is smaller than the predetermined reference value. 25. The line erasing apparatus as claimed in claim 23, wherein the load detector divides an input video data into one for each sub-field and one for each line to calculate an average value of a bit data per line and then compares the calculated average value with the predetermined reference value, thereby detecting the load amount for each of the desired number of lines in accordance with the compared difference value. 26. The line erasing apparatus as claimed in claim 23, wherein the erasure controller controls an application time of the erasing pulse at least one of high order sub-field set to have a high relative brightness ratio.