초록 ▼

A coil-winding method comprises: winding first coil clockwise around first, counterclockwise around second, and clockwise around third swath along mandrel, hooks grouped into swaths; winding second coil clockwise around between first arid second hooks of first to between first and second hooks of se

A coil-winding method comprises: winding first coil clockwise around first, counterclockwise around second, and clockwise around third swath along mandrel, hooks grouped into swaths; winding second coil clockwise around between first arid second hooks of first to between first and second hooks of second swath, counterclockwise around from between first and second hooks of second to between first and second hooks of third swath, clockwise around between first and second hooks of third to between first and second hooks of first swath; winding third coil clockwise around between second and third hooks of first to between second and third hooks of second swath, counterclockwise around from between second and third hooks of second to between second and third hooks of third swath, clockwise around between second and third hooks of third to between second and third hooks of first swath; and releasing wound coils.

대표청구항 ▼

A coil-winding method comprises: winding first coil clockwise around first, counterclockwise around second, and clockwise around third swath along mandrel, hooks grouped into swaths; winding second coil clockwise around between first arid second hooks of first to between first and second hooks of se

A coil-winding method comprises: winding first coil clockwise around first, counterclockwise around second, and clockwise around third swath along mandrel, hooks grouped into swaths; winding second coil clockwise around between first arid second hooks of first to between first and second hooks of second swath, counterclockwise around from between first and second hooks of second to between first and second hooks of third swath, clockwise around between first and second hooks of third to between first and second hooks of first swath; winding third coil clockwise around between second and third hooks of first to between second and third hooks of second swath, counterclockwise around from between second and third hooks of second to between second and third hooks of third swath, clockwise around between second and third hooks of third to between second and third hooks of first swath; and releasing wound coils. voltage generating circuit comprises a changing circuit for changing at least one of a temperature dependency and a voltage level of said basic voltage. 6. The semiconductor integrated circuit device according to claim 5, wherein said changing circuit comprises: a plurality of resistance elements connection in parallel to each other, and having respective resistance values different from each other; and a select circuit for connecting a selected resistance element in said plurality of resistance elements between an output node and a ground node in response to a select signal, a level of a voltage generated on said output node being set by said selected resistance element connected between the output node and the ground node. 7. The semiconductor integrated circuit device according to claim 3, wherein said reference voltage generating circuit comprises a changing circuit for changing at least one of a temperature dependency and a voltage level of the reference voltages. 8. The semiconductor integrated circuit device according to claim 7, wherein said changing circuit comprises: a plurality of resistance elements connected in parallel to each other and having resistance values different from each other; and a select circuit for connecting a selected resistance element of said plurality of resistance elements between an output node and a ground node in response to a select signal, a level of a voltage generated on said output node being set by said selected resistance element connected between the output node and the ground node. 9. The semiconductor integrated circuit device according to claim 3, wherein said basic voltage generating circuit generates a voltage having a constant voltage level independent of temperature as said basic voltage. 10. The semiconductor integrated circuit device according to claim 1, wherein said clock generating circuitry generates a plurality of clock signals different in cycle period from each other, and said cycle change circuitry comprises a clock select circuit for selecting a clock signal of said plurality of clock signals in accordance with said temperature detection output signal. 11. The semiconductor integrated circuit device according to claim 10, wherein said clock generating circuitry comprises: a master clock generating circuit for generating a master clock signal having a first cycle period; and a plurality of frequency dividing circuits each for frequency dividing said master clock signal with frequency division ratios different from other, and said clock select circuit selects one of output signals of said master clock generating circuit and said plurality of frequency dividing circuits in response to said temperature detection output signal. 12. The semiconductor integrated circuit device according to claim 10, wherein said clock generating circuit comprises a plurality of oscillating circuits generating clock signals different in cycle period from each other, and said clock select circuit selects one of output signals of said plurality of oscillating circuits in response to said temperature detection output signal. 13. A semiconductor integrated circuit device comprising: a memory circuit for storing data; temperature detecting circuitry, integrated together with said memory circuit on a common semiconductor substrate, for detecting an operating temperature; and clock generating circuitry, integrated together with said memory circuit on the common semiconductor substrate, for generating a clock signal having a cycle period changed according to an output signal of said temperature detecting circuitry, said clock signal being used in said memory circuit, wherein said temperature detecting circuitry comprises a circuit for generating a reference voltage having a voltage level dependent on the operating temperature, and said clock generating circuitry comprises a voltage controlled oscillating circuit having an oscillating cycle period set according t