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In accordance with a set of previously defined options relating to such things as information retrieval, applications, items of interest, payment options, etc., a software program configures the computer system on which it executes to access information on an item over which a pointer has hovered fo

In accordance with a set of previously defined options relating to such things as information retrieval, applications, items of interest, payment options, etc., a software program configures the computer system on which it executes to access information on an item over which a pointer has hovered for a preset time without the user having to provide any additional inputs. The information may be retrieved from a local or remote location. The information may be free, paid for by the user, a sponsor, or a third party. The information desired by the user is presented visual, audibly, or both.

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In accordance with a set of previously defined options relating to such things as information retrieval, applications, items of interest, payment options, etc., a software program configures the computer system on which it executes to access information on an item over which a pointer has hovered fo

In accordance with a set of previously defined options relating to such things as information retrieval, applications, items of interest, payment options, etc., a software program configures the computer system on which it executes to access information on an item over which a pointer has hovered for a preset time without the user having to provide any additional inputs. The information may be retrieved from a local or remote location. The information may be free, paid for by the user, a sponsor, or a third party. The information desired by the user is presented visual, audibly, or both. ond DAC has 8 bits of resolution. 16. The display device according to claim 1, where the first DAC is responsive to a first plurality of data bits and the second DAC is responsive to a second plurality of data bits, where at least one of the first and second pluralities of data bits is based on a dynamic range, and where at least one of the first and second pluralities of data bits is based on a resolution of an operating parameter. 17. The display device according to claim 16, where the dynamic range accounts for operation during at least one of daytime, nighttime, dusk, and dawn, and the operating parameter is brightness. 18. The display device according to claim 11, where the reference voltage is generated from the voltage supply of a vehicle. 19. The display device according to claim 1, further comprising: a light sensor disposed to sense ambient light on the lighted display; and control circuitry connected to receive an input signal from the light sensor, where the control circuitry selects the first and second data input values in response to the input signal, the first and second data inputs corresponding to an operating parameter. 20. The display device according to claim 19, where the light sensor is a logarithmic sensor. 21. The display device according to claim 1, further comprising: a user interface control circuitry connected to receive an input signal from the user interface, where the control circuitry selects the first and second data input values in response to the input signal, the first and second data inputs corresponding to an operating parameter. 22. The display device according to claim 1, where the DAC circuitry comprises at least one integrated circuit (IC) chip. 23. The display device according to claim 1, where the display device comprises a display of a navigation radio. 24. The display device according to claim 1, where the display device comprises a display of an electronic device. 25. The display device according to claim 1, where the electronic device is one of a communication device, a personal computer, and a personal organizer. 26. A resolution control system for a display device, comprising: a first digital-to-analog converter (DAC) comprising a first voltage output, a first data input, and a reference voltage input; where the first DAC divides a reference voltage into coarse voltages, where the first DAC selects one of the coarse voltages as a first output voltage in response to a first data input value, and a second digital-to-analog converter (DAC) operatively connected to the first voltage output from the first DAC, the second DAC comprising a second voltage output, a second data input, and an input for first voltage output, where the second DAC divides the first output voltage into fine voltages, where the second DAC selects one of the fine voltages as a second output voltage in response to a second data input value. 27. The resolution control system according to claim 26, where the first DAC and second DAC have an equal number of data bits of resolution. 28. The resolution control system according to claim 27, where the number of data bits is about eight. 29. The resolution control system according to claim 26, where the first DAC is responsive to a first plurality of data bits and the second DAC is responsive to a second plurality of data bits, where at least one of the pluralities of data bits is based on a dynamic range, and where at least one of the pluralities of data bits is based on a resolution of an operating parameter. 30. The resolution control system according to claim 26, where the reference voltage input is less than about 5 volts. 31. The resolution control system according to claim 26, where the reference voltage input is in the range of about 2.8 volts through about 3.8 volts. 32. The resolution control system according to claim 26, where the reference voltage input is about 3.3 volts. 33. The resolution control system according to claim 26, where the first and second data inputs provide an operating value for a parameter, and where the second output voltage corresponds to the operating value. 34. The resolution control system according to claim 33, where the parameter is one of brightness and contrast. 35. The resolution control system according to claim 33, where the operating value is a luminance value, and where the operating parameter is brightness. 36. The resolution control system according to claim 35, where the luminance value is in the range of about 0.5 nits through about 400 nits. 37. The resolution control system according to claim 26, where at least one of the first and second data inputs is selected from at least one sequence of data input values having a linear progression. 38. The resolution control system according to claim 26, where the second voltage output has constant ratio steps. 39. The resolution control system according to claim 26, where at least one of the first DAC and second DAC comprises at least one integrated circuit (IC) chip. 40. A method for controlling the resolution in a display device, comprising: dividing a reference voltage into coarse voltages; selecting one of the coarse voltages as a first output voltage in response to a first data input value; dividing the first output voltage into fine voltages; selecting one of the fine voltages as a second output voltage in response to a second data input value; and controlling an operating parameter of the display device in response to the second output voltage. 41. The method according to claim 40, where the first and second data input values are responsive to the operating parameter. 42. The method according to claim 40, further comprising selecting the first and second data input values from data input values having a linear progression. 43. The method according to claim 40, further comprising selecting the first and second data input values in response to an input signal from at least one of a light sensor user interface. 44. The method according to claim 40, where the second output voltage has constant ratio steps. 45. The method according to claim 40, where the operating parameter is one of brightness and contrast. 46. The method according to claim 40, where the operating parameter is responsive to a luminance value. 47. The method according to claim 46, where the luminance value is in the range of about 0.5 nits through about 400 nits. said bit lines. 3. The display panel as defined in claim 1, wherein each said light emitting device emits light comprising one of three primary colors. 4. The display panel as defined in claim 1, wherein said memory cell comprises one of a DRAM cell, an SRAM cell, a FRAM cell, and a PROM cell. 5. The display panel as defined in claim 1, wherein said light emitting device comprises at least one of a red light emitting diode, green light emitting diode and blue light emitting diode. 6. The display panel as defined in claim 1, wherein each said pixel element is associated with a memory cell storing display data such that refreshment of said display data is unnecessary. 7. The display as defined in claim 1, wherein each said pixel element comprises a video random access memory (VRAM) function and a display function such that a VRAM separate from said display panel is unnecessary. 8. The display panel as defined in claim 1, wherein each said pixel element comprises a video random access memory (VRAM) function and a display function so that a video controller function and an address decoder function are unified. 9. The display panel as defined in claim 1, wherein said data comprises image data, and said buffer receives said image data from a processor, converts said image data to display data, and transmits said display data to said pixel array. 10. The display panel as defined in claim 1, wherein said buffer receives display data from said pixel array, converts said display data to image data, and transmits said image data to a processor. 11. The display panel as defined in claim 1, wherein said memory cell comprises a dynamic random access memory (DRAM) cell so that bit lines may be consecutively selected while selecting a single word line. 12. The display panel as defined in claim 1, wherein said memory cell comprises a ferroelectric random access memory (FRAM), and wherein display data is maintained on said display panel after said display panel is switched off. 13. The display panel as defined in claim 1, wherein said memory cell comprises a programmable read only memory (PROM), and wherein said display panel displays advertising data. 14. The display panel as defined in claim 1, wherein if said write data is "1" said memory cell activates said MOS transistor. 15. The display panel as defined in claim 1, wherein if said write data is "0" said memory cell deactivates said MOS transistor. 16. A display panel comprising: a pixel array comprising a plurality of bit lines, a plurality of word lines, and a plurality of pixel elements, each said pixel element comprising: a light emitting device; a memory cell associated with said light emitting device and physically disposed within said pixel element; and a metal oxide semiconductor (MOS) transistor having a gate which receives data from said memory cell and activates and deactivates said light emitting device based on said data; an address port for receiving an address signal including a row address and a column address; a row address decoder for receiving said row address from said address port of specify one of said word lines; a column address decoder for receiving said column address from said address port to specify one of said bit lines; and an input/output buffer having a write mode for writing data through a specified bit line to said memory cell corresponding to a specified word line, and a read mode for reading data from said memory cell, said buffer transmitting display data from said pixel array to a processor during said read mode. 17. The display panel according to claim 16, wherein said read mode is used to store image data used to display an image in a data file. 18. The display panel according to claim 16, wherein a read operation is performed by specifying a pixel element and controlling said buffer to operate in a read mode. 19. A display panel comprising: a pixel array comprising a plurality of bit lines, a plurality of word lines, and a pluralit y of pixel elements, each said pixel element comprising: a light emitting device; a memory cell associated with said light emitting device and physically disposed within said pixel element; and a metal oxide semiconductor (MOS) transistor having a gate which receives data from said memory cell and activates and deactivates said light emitting device based on said data; and an input/output buffer having a write mode for writing data through a specified bit line to said memory cell corresponding to a specified word line, and a read mode for reading data from said memory cell, said buffer transmitting display data from said pixel array to a processor during said read mode. 20. The display panel according to claim 1, wherein said input/output buffer is directly coupled to said pixel array.