초록 ▼

The present invention concerns an apparatus for evaluating the quality of service in a network. The QoS evaluation apparatus includes an arrival detection section to provide a timestamp to a specific processing unit included in a packet that arrives at an attention point in the network and is branch

The present invention concerns an apparatus for evaluating the quality of service in a network. The QoS evaluation apparatus includes an arrival detection section to provide a timestamp to a specific processing unit included in a packet that arrives at an attention point in the network and is branched off by duplicating from a switching system. An estimation section estimates the arrival times of the plurality of processing units arriving at the attention point, and a simulation section simulates arrival times corresponding to the estimated arrival times at the attention point, produced by the arrival time estimation section, according to a pre-determined logic equation.

대표청구항 ▼

1. A quality of service evaluation apparatus comprising: an arrival detection section for accepting a packet duplicated and branched from packets passing through an attention point in a switching system, and assigning a timestamp of arrival time to a specific processing unit included in said pack

1. A quality of service evaluation apparatus comprising: an arrival detection section for accepting a packet duplicated and branched from packets passing through an attention point in a switching system, and assigning a timestamp of arrival time to a specific processing unit included in said packet; an estimating section for estimating arrival times of said processing units included in said packet at said attention point on a basis of said timestamp for said specific processing unit given by said arrival detection section; and a simulation section for simulating arrival time of said packet at said attention point actions of said attention point according to a simulation logic in which arrival time to correspond to said estimated arrival time at said attention point obtained by said estimating section was pre-set. 2. An apparatus according to claim 1, wherein said switching system is an ATM switching system, and said attention point is an output-line buffer in said ATM switching system. 3. An apparatus according to claim 1, wherein said processing unit is a cell and said specific processing unit is a first cell in an object packet. 4. An apparatus according to claim 2, wherein said processing unit is a cell, and said specific processing unit is an individual cell in an object packet. 5. An apparatus according to claim 3, wherein said estimating section includes a processing section for estimating an arrival time of an (i)th. cell in said packet according to a relation: [a timestamp of said first cell+(i-1)×(cell length/input-line speed)]. 6. An apparatus according to claim 3, wherein said estimating section includes a processing section which calculates an estimated arrival time of an (i)th. cell including in said packet from a relation: [an estimated arrival time of the first: cell+(i-1)×(cell length/input-line speed)],