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Methods for making semiconductor inductor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/20
출원번호 US-0614393 (2000-07-12)
발명자 / 주소
  • Bothra, Subhas
출원인 / 주소
  • Koninklljke Philips Electronics N.V.
대리인 / 주소
    Zawilski, Peter
인용정보 피인용 횟수 : 15  인용 특허 : 12

초록

A semiconductor inductor and a method for making a semiconductor inductor are provided. An oxide layer disposed over a substrate is etched to form an interconnect metallization trench within the oxide layer. The oxide layer is also etched to form a first inductor trench within the oxide layer such t

대표청구항

A semiconductor inductor and a method for making a semiconductor inductor are provided. An oxide layer disposed over a substrate is etched to form an interconnect metallization trench within the oxide layer. The oxide layer is also etched to form a first inductor trench within the oxide layer such t

이 특허에 인용된 특허 (12)

  1. Shih Cheng-Yeh,TWX ; Lee Yu-Hua,TWX ; Wu James (Cheng-Ming),TWX, Borderless dual damascene contact.
  2. D'Anna Pablo Eugenio, Fabrication of lateral RF MOS devices with enhanced RF properties.
  3. Noguchi Ko,JPX, Grooved wiring structure in semiconductor device and method for forming the same.
  4. Ewen John E. (Yorktown Heights NY) Ponnapalli Saila (Fishkill NY) Soyuer Mehmet (Yorktown Heights NY), High-Q inductors in silicon technology without expensive metalization.
  5. Nguyen Tue ; Hsu Sheng Teng, Low resistance contact between integrated circuit metal levels and method for same.
  6. Chen Yen-Ming,TWX ; Liu Wei-Jen,TWX ; Lin Shih-Chi,TWX ; Liu Kuo-Chou,TWX, Method of manufacturing self-aligned T-shaped gate through dual damascene.
  7. Heitzmann Michel (Crolles FRX) Lajzerowicz Jean (Meylan FRX) LaPorte Philippe (Sassenage FRX), Process for etching and depositing integrated circuit interconnections and contacts.
  8. Gonzalez Fernando ; Blalock Guy ; Prall Kirk, Semiconductor connection with a top surface having an enlarged recess.
  9. Fukuda Takuya,JPX ; Ohji Yuzuru,JPX ; Kobayashi Nobuyoshi,JPX, Semiconductor integrated circuit device and method of manufacturing same.
  10. Asano Isamu,JPX ; Tsuchiya Osamu,JPX, Semiconductor integrated circuit device and process for manufacturing the same.
  11. Yeh Wen-Kuan,TWX ; Lin Chih-Yung,TWX, Structure of combined passive elements and logic circuit on a silicon on insulator wafer.
  12. Wanlass Frank M., Ultra short channel damascene MOS transistors.

이 특허를 인용한 특허 (15)

  1. Harris, Edward Belden; Merchant, Sailesh Mansinh; Steiner, Kurt George; Vitkavage, Susan Clay, Inductor formed in an integrated circuit.
  2. Harris, Edward Belden; Merchant, Sailesh Mansinh; Steiner, Kurt George; Vitkavage, Susan Clay, Inductor formed in an integrated circuit.
  3. Harris,Edward Belden; Merchant,Sailesh Mansinh; Steiner,Kurt George; Vitkavage,Susan Clay, Inductor formed in an integrated circuit.
  4. Tsai, Fang-Lin; Chang, Yi-Feng; Liu, Cheng-Jen; Fu, Yi-Min; Chen, Hung-Chi, Layer structure for mounting semiconductor device and fabrication method thereof.
  5. Lehr, Matthias; Schaller, Matthias; Peters, Carsten, Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same.
  6. Keum, Dong Yeal, Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device.
  7. Keum, Dong-Yeal, Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device.
  8. Ozawa, Ken, Method for manufacturing semiconductor device and the semiconductor device.
  9. Chan, Lap; Chu, Sanford; Ng, Chit Hwei; Pradeep, Yelehanka Ramachandramurthy; Zheng, Jia Zhen, Method of forming a surface coating layer within an opening within a body by atomic layer deposition.
  10. Hose, Sallie; Burke, Peter A.; Jiang, Li; Shastri, Sudhama C., Method of manufacturing a semiconductor component and structure.
  11. Liu, Ping-Yin; Cheng, Kai-Wen; Huang, Xin-Hua; Chao, Lan-Lin; Tsai, Chia-Shiung; Chen, Xiaomeng, Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same.
  12. Burke, Peter A.; Hose, Sallie; Shastri, Sudhama C., Semiconductor component and method of manufacture.
  13. Burke, Peter A.; Hose, Sallie; Shastri, Sudhama C., Semiconductor component and method of manufacture.
  14. Chu, Tsui Ping; Yook, Hyung Sun; Sim, Poh Ching, Semiconductor device comprising a metal system including a separate inductor metal layer.
  15. Lee, Ki Young; Chae, Moosung M.; Kim, Woo Sik, Semiconductor device having non-magnetic single core inductor and method of producing the same.
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