IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0939140
(2001-08-24)
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발명자
/ 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
23 인용 특허 :
135 |
초록
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A semiconductor chip assembly includes a semiconductor chip, a conductive trace, a connection joint, an insulative adhesive and an encapsulant. The conductive trace includes a routing line and a pillar. The routing line extends within and outside a periphery of the chip, and the pillar is disposed o
A semiconductor chip assembly includes a semiconductor chip, a conductive trace, a connection joint, an insulative adhesive and an encapsulant. The conductive trace includes a routing line and a pillar. The routing line extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends away from the chip. The connection joint contacts and electrically connects the routing line and the pad. The adhesive is sandwiched between the routing line and the chip and contacts a surface of the routing line that faces away from the chip, thereby interlocking the routing line to the assembly. The encapsulant extends into a channel in the pillar, thereby interlocking the pillar to the assembly.
대표청구항
▼
A semiconductor chip assembly includes a semiconductor chip, a conductive trace, a connection joint, an insulative adhesive and an encapsulant. The conductive trace includes a routing line and a pillar. The routing line extends within and outside a periphery of the chip, and the pillar is disposed o
A semiconductor chip assembly includes a semiconductor chip, a conductive trace, a connection joint, an insulative adhesive and an encapsulant. The conductive trace includes a routing line and a pillar. The routing line extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends away from the chip. The connection joint contacts and electrically connects the routing line and the pad. The adhesive is sandwiched between the routing line and the chip and contacts a surface of the routing line that faces away from the chip, thereby interlocking the routing line to the assembly. The encapsulant extends into a channel in the pillar, thereby interlocking the pillar to the assembly. rovided. On a flattening film made of a resin, a first transparent conductive film and an insulating film for capacitance are formed into a lamination to form in this laminated film an opening portion An insulating film covering near the opening portion is formed. A transparent conductive film is formed and patterned to form a pixel electrode Thus is formed a storage capacitance having the structure where the insulating film for capacitance is sandwiched between the first transparent conductive film and the pixel electrode. hybrid stack. 8. The method of claim 7, wherein said second substrate is a multi chip module dielectric stack. 9. The method of claim 7, wherein said singulated semiconductor stack is a high electron mobility transistor. 10. The method of claim 7, wherein said removing comprises selectively etching said first substrate. 11. A method of fabricating a semiconductor device, comprising: depositing a sacrificial layer onto a first substrate; depositing two or more layers of semiconducting material onto said sacrificial layer to form a first semiconductor stack; singulating said first semiconductor stack to form a first group of singulated semiconductor stacks, wherein said first group is comprised of at least a first singulated semiconductor stack having an upper semiconducting layer, a lower first substrate layer, and an inner semiconducting layer in contact with said bottom first substrate layer; providing a second substrate having a first conductive layer and a first bonding material deposited thereon; selecting said first singulated semiconductor stack from said first group; attaching said upper semiconducting layer of said first singulated semiconductor stack to said conductive layer to form a second semiconductor stack; and removing said first substrate layer and one or more layers of said two or more layers of semiconducting material from said second semiconductor stack so as to form a semiconducting device wherein said inner semiconducting layer is exposed. 12. The method of claim 11, wherein said second substrate is glass. 13. The method of claim 11, wherein said second substrate is a multi chip module dielectric stack. 14. The method of claim 11, wherein said first bonding material is an organic polymer. 15. The method of claim 11, wherein said first singulated semiconductor stack is a high electron mobility transistor. 16. The method of claim 11, wherein said removing further comprises selectively etching said sacrificial layer. 17. A method of producing a plurality of semiconductor devices, comprising: forming a stack of semiconductor layers on a first substrate; singulating said stack of semiconductor layers and said first substrate, so as to obtain a plurality of sub-parts; attaching at least one of said sub-parts to a second substrate, wherein said second substrate is in contact with said singulated stack of semiconductor layers; removing from each of said sub-parts attached to said second substrate a singulated portion of said first substrate so as to form a semiconductor device on said second substrate. 18. The method of claim 17, further comprising forming resistors and capacitors on said second substrate. 19. The method of claim 17, further comprising forming interconnects on said second substrate. 20. The method of claim 17, wherein said second substrate is a multi-chip module dielectric stack. 21. The method of claim 17, wherein said semiconductor device formed on said second substrate is a high electron mobility transistor. 22. The method of claim 17, wherein said semiconductor device formed on said second substrate is an active microwave circuit. 23. The method of claim 17, wherein said first substrate is germanium substrate. 24. The method of claim 23, further comprising removing said germanium substrate in a CF4-O2 plasma etch. 25. The method of claim 17, further comprising forming an optical waveguide in said semiconducting device. 26. The method of claim 17, further comprising: forming an interconnect pattern and dielectric isolation; forming a second semiconductor device on top of said first semiconductor device according to the method of claim 17. 27. The method of claim 1, wherein said second substrate is a semiconductor having a band gap different from that of said second semiconductor stack. regions 28 of the semiconductor substrate 10. A selectively removable filler layer 30 is then deposited on the FET protection layer 26 with a thickness to over-fill the recessed regions 28 of the gates 24 of the FETs. The selectively removable filler layer 30 is then planarized until the FET protection layer 26 on top of the gates 24 is exposed. The recessed regions 28 between the gates 24 are left substantially filled with selectively removable filler layer 30. The selectively removable filler layer 30 in the region where the BJT is formed is patterned and an opening 32 is made to allow for the depositing of layers of different materials 34, 36, 38, 40, 42, 44 used in the construction of the BJT. The layer of different materials 34, 36, 38, 40, 42, 44 are processed by methods known in the art to form polysilicon emitter 46 of the BJT. Due to selectively removable filler layer 30 creating a substantially planar surface in the recessed regions 28 of the FETs, little to none of the layers of different materials 34, 36, 38, 40, 42, 44 that are used in the construction of the BJT are deposited within the recessed regions 28. Thus, removal of the layers of different materials 34, 36, 38, 40 (40'), 42, 44 from the FET region is simplified. After removal of the layers of different materials 34, 36, 38, 40 (40'), 42, 44 from the FET region, the selectively removable filler layer 30 is removed selectively to the FET protection layer 26. The FET protection layer 26 is then removed. The recessed regions 28 between the gates 24 of the FETs are free from residual films. transferring a tubular probe, which is provided to a pipetting apparatus and attachable with said pipetting tip, toward a high humidity chamber, introducing highly humid air in said high humidity chamber into said probe, sucking said pipetting objective solution from said one container into said pipette tip by moving said pipette tip toward said one container under a condition that highly humid air is contained in said pipette tip attached with said probe, transferring said pipette tip toward said other container, discharging said pipetting objective solution sucked in said pipetting tip into said other container, and detaching said pipette tip from said pipetting apparatus after performing the pipetting, wherein a relative humidity of said highly humid air introduced into said pipette tip is at least 80%. 2. A method for pipetting as claimed in claim 1, further comprising the steps of: attaching said pipette tip with said probe before transferring said probe toward the high humidity chamber, and introducing highly humid air into said probe through said pipette tip. 3. A method for pipetting as claimed in claim 1, further comprising the steps of: introducing highly humid air into said probe before attaching said pipette tip with said probe, attaching said pipette tip with said probe, and transferring the highly humid air introduced in said probe into said pipette tip. 4. A method for pipetting as claimed in claim 1, wherein said pipetting objective solution is either a sample or a reagent. 5. A method for pipetting a pipetting objective solution from one container to another container using a disposable pipette tip comprising the steps of: filling a tubular probe, which is provided to a pipetting apparatus and attachable with said pipette tip, with a pressure transmitting medium liquid supplied from a liquid transferring apparatus connected to said tubular probe, introducing a designated amount of air into said probe by moving said medium liquid backward using said pressure changing mechanism before or after attaching the pipette tip to said probe, discharging a designated amount of air through said pipette tip so highly humid air remains in said pipette tip, sucking said pipetting objective solution into said pipette tip from said one container, and adding said sucked pipetting objective solution into said other container, wherein an amount of air introduced into said probe is more than the inner capacity of the pipette tip, and a temperature of the tip storing portion, wherein said pipette tips before attaching to said probe are stored, is maintained in the range of 4° C. to 10° C. 6. A method for pipetting as claimed in claim 5, wherein an amount of air released from said pipette tip is less than the amount of air introduced into said pipette tip and said probe. 7. A pipetting apparatus for pipetting a pipetting objective solution from one container to another container using a disposable pipette tip comprising: a humidity adding device for adding humidity to air in a high humidity chamber, a transferring device for transferring a tubular probe, which is provided with said pipette tip, to respective positions of said high humidity chamber, said one container, and said another container, and a controlling portion for controlling an operation so as to position said pipette tip at said high humidity chamber before pipetting said pipetting objective solution, and for controlling an operation so as to suck highly humid air into said pipette tip, wherein a relative humidity of said highly humid air introduced into said pipette tip is at least 80%. 8. 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