초록 ▼

If a clock signal ck is "H" and an input pulse signal in (first control signal) is "H", then n-type transistors M15 and M16 are turned on to make an output node/OUT have the GND level. Then, a p-type transistor M12 is turned on to make an output node OUT have a Vcc (16 V) level. Thus, a latch circui

If a clock signal ck is "H" and an input pulse signal in (first control signal) is "H", then n-type transistors M15 and M16 are turned on to make an output node/OUT have the GND level. Then, a p-type transistor M12 is turned on to make an output node OUT have a Vcc (16 V) level. Thus, a latch circuit LAT operates as a level shifter circuit when first and second control signals and the clock signal ck are at "H" and operates as a level hold circuit in any other case. Therefore, the shift register circuit constructed of the latch circuit LAT functions as a low-voltage interface, and the input of the clock signal ck is stopped when the latch circuit LAT is inactive, so that the load and the consumption of power of the clock signal line are reduced.

대표청구항 ▼

If a clock signal ck is "H" and an input pulse signal in (first control signal) is "H", then n-type transistors M15 and M16 are turned on to make an output node/OUT have the GND level. Then, a p-type transistor M12 is turned on to make an output node OUT have a Vcc (16 V) level. Thus, a latch circui

If a clock signal ck is "H" and an input pulse signal in (first control signal) is "H", then n-type transistors M15 and M16 are turned on to make an output node/OUT have the GND level. Then, a p-type transistor M12 is turned on to make an output node OUT have a Vcc (16 V) level. Thus, a latch circuit LAT operates as a level shifter circuit when first and second control signals and the clock signal ck are at "H" and operates as a level hold circuit in any other case. Therefore, the shift register circuit constructed of the latch circuit LAT functions as a low-voltage interface, and the input of the clock signal ck is stopped when the latch circuit LAT is inactive, so that the load and the consumption of power of the clock signal line are reduced. so that information is transmitted to the communication partner, wherein 90% or more of crystal lattices in crystal grain boundaries of the channel formation region have continuity. 11. An information processing device according to claim 10, wherein said input operating unit is a sound collecting unit. 12. An information processing device according to claim 10, wherein said input operating unit is an image pick-up unit. 13. An information processing device according to claim 10, wherein writing of one screen is carried out at 45 Hz to 180 Hz in said flat panel displays, and a polarity of voltage applied to a pixel electrode is inverted for every screen to obtain screen display in said display unit. 14. The information processing device according to claim 10 wherein said substrate is a glass substrate. 15. An information processing device comprising: a communication device comprising an input operating unit for inputting a voice data of a user and a unit for covering said voice data into characters and transmitting them to a communication partner; and a display unit operationally connected to said communication device and comprising flat panel displays for a right eye and a left eye and being mounted on a head of a user, wherein each of said flat panel displays comprises a plurality of first thin film transistors, each having a channel formation region, arranged in a matrix for switching pixels and a driver circuit comprising second thin film transistors for driving said first thin film transistors, said first and second thin film transistors formed over a same substrate wherein said communication device and said display unit are adapted to be used by the same user, and wherein 90% or more of crystal lattices in crystal grain boundaries of the channel formation region have continuity. 16. An information processing device comprising: a display unit comprising flat panel displays for a right eye and a left eye and being mounted on a head of a user; a communication device operationally connected to said display unit; an input operating unit for inputting a voice data of a communication partner; and a unit for converting the voice data of the communication partner into characters, wherein said characters are displayed on a virtual display screen provided to the user by said display unit wherein said communication device and said display unit are adapted to be used by the same user, and wherein 90% or more of crystal lattices in crystal grain boundaries of the channel formation region have continuity. 17. An information processing device according to claims 15 or 16, wherein said input operating unit is a sound collecting unit. 18. An information processing device according to claim 16, wherein said input operating unit is an image pick-up unit. 19. An information processing device according to claim 16, wherein the channel formation region of a TFT connected to a pixel electrode of said flat panel displays of said display unit is constituted of a semiconductor thin film that is collective of a plurality of rod-like or flattened rod-like crystals formed on an insulating surface. 20. An information processing device according to claim 19, wherein a surface orientation of the channel formation region is substantially a {110} orientation. 21. An information processing device according to claim 16, wherein writing of one screen is carried out at 45 Hz to 180 Hz in said flat panel displays, and a polarity of voltage applied to a pixel electrode is inverted for every screen to obtain screen display in said display unit. 22. An information processing device according to claim 16, wherein a liquid crystal material of said flat panel displays of said display unit is an antiferroelectric liquid crystal substantially having no threshold value. 23. An information processing device according to claim 16, wherein said display unit comprising said flat panel displays for the right eye and the left eye and being mounted on t he head of the user, provides a virtual flat picture to the user. 24. An information processing device according to claim 16, wherein said display unit comprising said flat panel display for the right eye and the left eye and being mounted on the head of the user, provides a virtual three-dimensional picture to the user. 25. An information processing device comprising: a control device; an input operating device operationally connected to said control device, through which a command is input to said control device by an operator; and a display unit to be set on a face of the operator, said display unit including at least one display panel operationally connected to said control device, wherein said display panel is to be placed in front of an eye of the operator, wherein said display panel comprises a substrate having an insulating surface, a plurality of pixel electrodes arranged in a matrix form over the substrate, a plurality of first thin film transistors, each having a channel formation region, for switching said pixel electrodes, and a driver circuit comprising a plurality of second thin film transistors for driving said first thin film transistors, said first and second thin film transistors comprising a crystalline semiconductor layer as an active layer thereof, wherein said control device, said control device and said display unit are adapted to be used by the same user, and wherein 90% or more of crystal lattices in crystal grain boundaries of the channel formation region have continuity. 26. An information processing device according to claim 25 wherein a two dimensional image is displayed on said display panel. 27. An information processing device according to claim 25 further comprising a device for converting voice data into characters wherein said characters are displayed on said display panel. 28. An information processing device according to claim 25 wherein said display panel is a liquid crystal display device. 29. An information processing device according to claim 28, wherein said thin film transistor has a subthreshold coefficient is within a range from 60 to 80 mV/decade. 30. An information processing device according to claim 15 wherein said input operating unit is an image pick-up unit. 31. An information processing device according to claim 15 wherein writing of one screen is carried out at 45 Hz to 180 Hz in said flat panel displays, and a polarity of voltage applied to a pixel electrode is inverted for every screen to obtain screen display in said display unit. 32. The information processing device according to claim 25 wherein said display panel is an electroluminescent display device. 33. The information processing device according to claim 25 wherein said display panel is driven at a frame frequency of 45 Hz or larger. 34. The information processing device according to claim 25 wherein said crystalline semiconductor layer comprises continuous grain silicon. 35. The information processing device according to claim 25 wherein said flat panel display is an electroluminescent display device. 6173899, 20010100, Rozin; US-6211799, 20010400, Post et al.; US-6365500, 20020400, Chang et al., 438/614