$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Structure and method for fabrication of a leadless chip carrier with embedded antenna 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/00
  • H01L-029/82
  • H01L-043/00
출원번호 US-0916666 (2001-07-26)
발명자 / 주소
  • Coccioli, Roberto
  • Megahed, Mohamed
  • Hashemi, Hassan S.
출원인 / 주소
  • Skyworks Solutions, Inc.
대리인 / 주소
    Farjami & Farjami LLP
인용정보 피인용 횟수 : 90  인용 특허 : 21

초록

A substrate has a top surface for receiving a semiconductor die. An antenna is patterned on the bottom surface of the substrate. The antenna is accessible by coupling it to a via and, through the via, to a substrate signal bond pad and a semiconductor die signal bond pad. In one embodiment, there is

대표청구항

1. A structure comprising: a substrate having a top surface and a bottom surface; a die attached to said top surface of said substrate; an antenna attached to said substrate; a printed circuit board permanently attached to said bottom surface of said substrate; a first via in said substrate;

이 특허에 인용된 특허 (21)

  1. Weber Bernd,DEX ; Hofsaess Dietmar,DEX ; Butschkau Werner,DEX ; Dittrich Thomas,DEX ; Schiefer Peter,DEX, Arrangement including a substrate for power components and a heat sink, and a method for manufacturing the arrangement.
  2. Selna Erich (Mountain View CA), Ball grid array package for a integrated circuit.
  3. Ference Thomas G. ; Howell Wayne J. ; Sprogis Edmund J., Dual chip with heat sink.
  4. Celaya Phillip C. ; Kerr John R., Electronic component assembly having an encapsulation material and method of forming the same.
  5. Yamamoto Toshio,JPX ; Hirachi Yasutake,JPX, Hermetically sealed semiconductor module composed of semiconductor integrated circuit and antenna element.
  6. Palmer Mark J., Integrated circuit package with a plurality of vias that are electrically connected to an internal ground plane and ther.
  7. Gaul Stephen Joseph, Intergrated circuit with coaxial isolation and method.
  8. Hashemi Hassan S., Leadless chip carrier design and structure.
  9. Houghton Christopher Lee ; Brench Colin Edward, Method and system for controlling radio frequency radiation in microelectronic packages using heat dissipation structures.
  10. Beilstein ; Jr. Kenneth Edward ; Bertin Claude Louis ; Cronin John Edward ; Howell Wayne John ; Leas James Marc ; Perlman David Jacob, Method and workpiece for connecting a thin layer to a monolithic electronic modules surface and associated module pack.
  11. Miyagi Takeshi (Fujisawa JPX) Matsumoto Kazuhiro (Yokohama JPX) Sasaki Tomiya (Yokohama JPX) Iwasaki Hideo (Kawasaki JPX) Hisano Katsumi (Yokohama JPX), Multi-layer substrate.
  12. Michael D. Rostoker ; Kumaraguru Muthukumaraswamy, On-chip antenna, and systems utilizing same.
  13. Katchmar Roman (Ottawa CAX), Printed circuit board and heat sink arrangement.
  14. Tseng Tzyy-Jang,TWX ; Cheng David C. H.,TWX ; Lao Shaw-Wen,TWX, Printed circuit board with thermal conductive structure.
  15. Inoue Kazuaki,JPX ; Yamashita Hiroyuki,JPX ; Nakamura Norio,JPX ; Yoda Hiroyuki,JPX, Semiconductor device for heat discharge.
  16. Gaku Morio,JPX ; Ikeguchi Nobuyuki,JPX ; Kobayashi Toshihiko,JPX, Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package.
  17. Gaku Morio,JPX ; Ikeguchi Nobuyuki,JPX ; Kobayashi Toshihiko,JPX, Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package.
  18. Yoshida Yuichi,JPX, Stacked semiconductor device.
  19. Ahn Kie Y. ; Forbes Leonard ; Cloud Eugene H., Structure and method for a high performance electronic packaging assembly.
  20. Tsuru Teruhisa (Nagaokakyo JPX) Okamura Hisatake (Nagaokakyo JPX) Mandai Harufumi (Nagaokakyo JPX) Kato Mitsuhide (Nagaokakyo JPX) Tonegawa Ken (Nagaokakyo JPX), Surface-mountable antenna unit.
  21. Kevin Kwong-Tai Chung, Tamper-resistant wireless article including an antenna.

이 특허를 인용한 특허 (90)

  1. Strid, Eric; Gleason, K. Reed, Active wafer probe.
  2. Li,Felix C., Apparatus and method for enhanced thermal conductivity packages for high powered semiconductor devices.
  3. Li,Felix C., Apparatus and method for enhanced thermal conductivity packages for high powered semiconductor devices.
  4. Strid, Eric; Campbell, Richard, Calibration structures for differential signal probing.
  5. Dishongh,Terrance; Roth,Weston C.; Searls,Damion T.; Pearson,Tom E., Ceramic embedded wireless antenna.
  6. Ho,Kwun Yao; Kung,Moriss, Chip carrier with oxidation protection layer.
  7. Dunklee, John, Chuck for holding a device under test.
  8. Dunklee, John, Chuck for holding a device under test.
  9. Dunklee, John, Chuck for holding a device under test.
  10. Dunklee,John, Chuck for holding a device under test.
  11. Dunklee,John, Chuck for holding a device under test.
  12. Dunklee,John, Chuck for holding a device under test.
  13. Stewart, Craig; Lord, Anthony; Spencer, Jeff; Burcham, Terry; McCann, Peter; Jones, Rod; Dunklee, John; Lesher, Tim; Newton, David, Chuck for holding a device under test.
  14. Stewart,Craig; Lord,Anthony; Spencer,Jeff; Burcham,Terry; McCann,Peter; Jones,Rod; Dunklee,John; Lesher,Tim; Newton,David, Chuck for holding a device under test.
  15. Andrews, Peter; Froemke, Brad; Dunklee, John, Chuck with integrated wafer support.
  16. Andrews,Peter; Froemke,Brad; Dunklee,John, Chuck with integrated wafer support.
  17. Greiner, Ralf; Maier, Josef; Paintner, Kai; Sinning, Richard, Compact circuit carrier package.
  18. Campbell, Richard; Strid, Eric W.; Andrews, Mike, Differential signal probe with integral balun.
  19. Strid, Eric; Campbell, Richard, Differential signal probing system.
  20. Campbell, Richard L.; Andrews, Michael, Differential waveguide probe.
  21. Burcham, Terry; McCann, Peter; Jones, Rod, Double sided probing structures.
  22. Burcham,Terry; McCann,Peter; Jones,Rod, Double sided probing structures.
  23. Coccioli, Roberto; Megahed, Mohamed A.; Trinh, Trang N.; Vittorini, Larry D.; Walley, John S., Embedded antenna and semiconductor die on a substrate in a laminate package.
  24. Dunklee, John; Norgden, Greg; Cowan, C. Eugene, Guarded tub enclosure.
  25. Moriyama, Shinji; Yamada, Tomio, Hybrid integrated circuit device and electronic device.
  26. Wyland, Chris, Integrated circuit nanotube-based subsrate.
  27. Kuzawinski, Mark J.; Wolf, Edward M., Integrated circuit package with overlapping bond fingers.
  28. McFadden,Bruce, Localizing a temperature of a device for testing.
  29. Gleason, K. Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing method using improved contact.
  30. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing method using improved contact.
  31. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing structure with laterally scrubbing contacts.
  32. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing system.
  33. Smith,Kenneth; Gleason,Reed, Membrane probing system.
  34. Smith,Kenneth; Gleason,Reed, Membrane probing system.
  35. Tervo,Paul A.; Smith,Kenneth R.; Cowan,Clarence E.; Dauphinais,Mike P.; Koxxy,Martin J., Membrane probing system.
  36. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing system with local contact scrub.
  37. Hayden, Leonard; Martin, John; Andrews, Mike, Method of assembling a wafer probe.
  38. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth, Method of constructing a membrane probe.
  39. Smith, Kenneth R., Method of replacing an existing contact of a wafer probing assembly.
  40. Brosnan, Michael J., Non-resonant antennas embedded in wireless peripherals.
  41. Strid,Eric; Campbell,Richard, On-wafer test structures for differential signals.
  42. Downey,Susan H.; Chopin,Sheila F.; Harper,Peter R.; Safai,Sohrab; Tran,Tu Anh; Woosley,Alan H., Packaged integrated circuit having wire bonds and method therefor.
  43. Min, Yongki, Pre-patterned thin film capacitor and method for embedding same in a package substrate.
  44. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  45. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
  46. Campbell,Richard L.; Andrews,Michael; Bui,Lynh, Probe for high frequency signals.
  47. Smith, Kenneth; Jolley, Michael; Van Syckel, Victoria, Probe head having a membrane suspended probe.
  48. Smith,Kenneth; Jolley,Michael; Van Syckel,Victoria, Probe head having a membrane suspended probe.
  49. Schwindt,Randy, Probe holder for testing of a test device.
  50. Nordgren, Greg; Dunklee, John, Probe station.
  51. Nordgren, Greg; Dunklee, John, Probe station.
  52. Peters, Ron A.; Hayden, Leonard A.; Hawkins, Jeffrey A.; Dougherty, R. Mark, Probe station having multiple enclosures.
  53. Peters,Ron A.; Hayden,Leonard A.; Hawkins,Jeffrey A.; Dougherty,R. Mark, Probe station having multiple enclosures.
  54. Cowan, Clarence E.; Tervo, Paul A.; Dunklee, John L., Probe station thermal chuck with shielding for capacitive current.
  55. Dunklee,John; Cowan,Clarence E., Probe station with low inductance path.
  56. Lesher, Timothy; Miller, Brad; Cowan, Clarence E.; Simmons, Michael; Gray, Frank; McDonald, Cynthia L., Probe station with low noise characteristics.
  57. Navratil,Peter; Froemke,Brad; Stewart,Craig; Lord,Anthony; Spencer,Jeff; Runbaugh,Scott; Fisher,Gavin; McCann,Pete; Jones,Rod, Probe station with two platens.
  58. Lesher, Timothy E., Probe testing structure.
  59. Smith, Kenneth R.; Hayward, Roger, Probing apparatus with impedance optimized interface.
  60. Smith, Kenneth R., Replaceable coupon for a probing apparatus.
  61. Reisner, Russ, Semiconductor die with backside passive device integration.
  62. Choi, Soung-yong; Park, Min-hyo, Semiconductor package form within an encapsulation.
  63. Choi, Seung-yong; Park, Min-hyo, Semiconductor package formed within an encapsulation.
  64. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for high-frequency testing of a device under test.
  65. Gleason, K. Reed; Lesher, Tim; Strid, Eric W.; Andrews, Mike; Martin, John; Dunklee, John; Hayden, Leonard; Safwat, Amr M. E., Shielded probe for testing a device under test.
  66. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  67. Gleason,K. Reed; Lesher,Tim; Andrews,Mike; Martin,John, Shielded probe for testing a device under test.
  68. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for testing a device under test.
  69. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe for testing a device under test.
  70. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe with low contact resistance for testing a device under test.
  71. Dunklee,John, Switched suspended conductor and connection.
  72. Strid,Eric W.; Schappacher,Jerry B.; Carlton,Dale E.; Gleason,K. Reed, System for evaluating probing networks.
  73. Andrews, Peter; Hess, David, System for testing semiconductors.
  74. Yang, Se Young; Uzoh, Cyprian Emeka; Huynh, Michael; Katkar, Rajesh, TSV fabrication using a removable handling structure.
  75. Negishi, Kazuki; Hansen, Mark, Test apparatus for measuring a characteristic of a device under test.
  76. Campbell, Richard, Test structure and probe for differential signals.
  77. Campbell,Richard, Test structure and probe for differential signals.
  78. Gaynes, Michael Anthony; Kam, Dong Gun; Liu, Duixian; Reynolds, Scott Kevin, Thermal interface material application for integrated circuit cooling.
  79. Rumbaugh,Scott, Thermal optical chuck.
  80. Krishtul, Izhak, Three dimensional antennas formed using wet conductive materials and methods for production.
  81. Hayden, Leonard; Martin, John; Andrews, Mike, Wafer probe.
  82. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
  83. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
  84. Schwindt, Randy J.; Harwood, Warren K.; Tervo, Paul A.; Smith, Kenneth R.; Warner, Richard H., Wafer probe station having a skirting component.
  85. Schwindt,Randy J.; Harwood,Warren K.; Tervo,Paul A.; Smith,Kenneth R.; Warner,Richard H., Wafer probe station having a skirting component.
  86. Harwood, Warren K.; Tervo, Paul A.; Koxxy, Martin J., Wafer probe station having environment control enclosure.
  87. Harwood,Warren K.; Tervo,Paul A.; Koxxy,Martin J., Wafer probe station having environment control enclosure.
  88. Campbell, Richard, Wideband active-passive differential signal probe.
  89. Lee, Ta-Chun, Wirebonded semiconductor package.
  90. Fukushima, Hiroyuki; Kumokawa, Fumio, Wiring board.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로