초록 ▼

A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that ma

A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that may be in the vicinity of the original point of I/O interconnect but can also be located at a distance from this original point of I/O interconnect. Layers of passivation and polyimide are provided for proper creation and protection of the extended and relocated I/O pads. Wire bonding is used to further interconnect the relocated I/O pads.

대표청구항 ▼

A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that ma

A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that may be in the vicinity of the original point of I/O interconnect but can also be located at a distance from this original point of I/O interconnect. Layers of passivation and polyimide are provided for proper creation and protection of the extended and relocated I/O pads. Wire bonding is used to further interconnect the relocated I/O pads. ikichi et al., 357/067; US-5625217, 19970400, Chau et al., 257/412; US-5849623, 19981200, Wojnarowski et al., 438/382; US-6018182, 20000100, Morosawa, 257/347; US-6027961, 20000200, Maiti et al., 438/199; US-6225168, 20010500, Gardner et al., 435/287; US-6380011, 20020400, Yamazaki et al., 438/163; US-6407430, 20020600, Ohtani et al., 257/350; US-20020008257, 20020100, Barnak et al., 257/262 O.G. Schmidt, et al., "Reduced Critical Thickness and Photoluminescence Line Splitting in Multiple Layers of Self-Assembled Ge/Si Islands", Materials Science and Engineering B74, 2000 (pp. 248-252). A.A. Darhuber, et al., "High-Resolution X-ray Diffraction from Multilayered Self-Assembled Ge Dots", Physical Review B, vol. 55, No. 23, Jun. 15, 1997 (pp. 15 652-15 663). Vinh Le Thanh, et al., "Strain-Driven Modification of the Ge/Si Growth Mode in Stacked Layers: A Way to Produce Ge Islands Having Equal Size in all Layers", Thin Solid Films 36, 2000 (pp. 43-48). 9183, WO; WO 00/58024, WO