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A method of managing power in an electronic device having at least one connectable component includes determining a total power requirement for the at least one connectable component. The available power level for a power supply connected to the electronic device is determined. The total power requi

A method of managing power in an electronic device having at least one connectable component includes determining a total power requirement for the at least one connectable component. The available power level for a power supply connected to the electronic device is determined. The total power requirement is compared with the available power level. The at least one connectable component may draw power from the power supply if the total power requirement is not greater than the available power level.

대표청구항 ▼

A method of managing power in an electronic device having at least one connectable component includes determining a total power requirement for the at least one connectable component. The available power level for a power supply connected to the electronic device is determined. The total power requi

A method of managing power in an electronic device having at least one connectable component includes determining a total power requirement for the at least one connectable component. The available power level for a power supply connected to the electronic device is determined. The total power requirement is compared with the available power level. The at least one connectable component may draw power from the power supply if the total power requirement is not greater than the available power level. rocessing element memory address to a global memory address within a defined address space. Thus, the system may allocate memory addresses used by a single one of the memory elements to an address space used by only a single processing element. The system further has access ports to each of the memory elements, thus allowing the single processing element limited access to other memory modules. Conversely, other processing elements may have limited access to the single memory module. As a result, the single computing system may be divided into two logical computing systems. Software upgrades may be loaded into one system, without interrupting the other system. 232, 19950400, Lloyd et al., 414/280; US-5418713, 19950500, Allen, 364/403; US-5420403, 19950500, Allum et al., 235/375; US-5420943, 19950500, Mak, 382/313; US-5424524, 19950600, Ruppert et al., 235/462; US-5438355, 19950800, Palmer, 348/001; US-5446490, 19950800, Blahut et al., 348/007; US-5446919, 19950800, Wilkins, 455/006.2; US-5491508, 19960200, Friedell et al., 348/016; US-5493107, 19960200, Gupta et al., 235/383; US-5519878, 19960500, Dolin, Jr., 395/800; US-5530852, 19960600, Meske, Jr. et al., 396/600; US-5570295, 19961000, Isenberg et al., 379/090.01; US-5572643, 19961100, Judson, 395/793; US-5592551, 19970100, Lett et al., 380/020; US-5594226, 19970100, Steger, 235/379; US-5602377, 19970200, Beller et al., 235/462; US-5604542, 19970200, Dedrick, 348/552; US-5640193, 19970600, Wellner, 348/007; US-5649186, 19970700, Ferguson, 395/610; US-5664110, 19970900, Green et al., 705/026; US-5671282, 19970900, Wolff et al., 380/025; US-5675721, 19971000, Freedman et al., 395/129; US-5682540, 19971000, Klotz, Jr. et al., 395/766; US-5694163, 19971200, Harrison, 348/013; US-5708780, 19980100, Levergood et al., 709/229; US-5710887, 19980100, Chelliah et al., 395/226; US-5715314, 19980200, Payne et al., 705/078; US-5724424, 19980300, Gifford, 705/079; US-5745681, 19980400, Levine et al., 395/200.3; US-5754906, 19980500, Yoshida, 396/448; US-5757917, 19980500, Rose et al., 380/025; US-5761606, 19980600, Wolzien, 455/006.2; US-5764906, 19980600,