IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0616044
(2000-07-13)
|
우선권정보 |
JP-0200441 (1999-07-14) |
발명자
/ 주소 |
- Nagata, Hideki
- Mori, Toshiharu
- Yuki, Hiroshi
- Kawai, Hideki
- Sugimoto, Akira
- Ishimaru, Kazuhiko
|
출원인 / 주소 |
|
대리인 / 주소 |
Burns, Doane, Swecker & Mathis, LLP
|
인용정보 |
피인용 횟수 :
0 인용 특허 :
31 |
초록
A glass ceramics composition for recording disk substrate contains, essentially, expressed in terms of weight percent on the oxide basis, from 35 to 50 wt % of SiO2,from 10 to 30 wt % of Al2O3,from 10 to 30 wt % of MgO, and from 2.6 to 8 wt % of Li2O.
대표청구항
▼
A glass ceramics composition for recording disk substrate contains, essentially, expressed in terms of weight percent on the oxide basis, from 35 to 50 wt % of SiO2,from 10 to 30 wt % of Al2O3,from 10 to 30 wt % of MgO, and from 2.6 to 8 wt % of Li2O. for fabricating a semiconductor integrated circ
A glass ceramics composition for recording disk substrate contains, essentially, expressed in terms of weight percent on the oxide basis, from 35 to 50 wt % of SiO2,from 10 to 30 wt % of Al2O3,from 10 to 30 wt % of MgO, and from 2.6 to 8 wt % of Li2O. for fabricating a semiconductor integrated circuit device as claimed in claim 1, wherein the wafer to be introduced into the single wafer heat treatment chamber is pre-heated up to the third temperature prior to introduction into the single wafer heat treatment chamber. 7. A method for fabricating a semiconductor integrated circuit device as claimed in claim 1, wherein the second temperature is not lower than 700° C. 8. A method for fabricating a semiconductor integrated circuit device as claimed in claim 7, wherein the first temperature is not higher than 500° C. 9. A method for fabricating a semiconductor integrated circuit device as claimed in claim 8, wherein the third temperature is about 140° C. 10. A method for fabricating a semiconductor integrated circuit device as claimed in claim 4, wherein the second temperature is not lower than 700° C. 11. A method for fabricating a semiconductor integrated circuit device as claimed in claim 10, wherein the first temperature is not higher than 500° C. 12. A method for fabricating a semiconductor integrated circuit device as claimed in claim 11, wherein the third temperature is about 140° C. 13. A method for fabricating a semiconductor integrated circuit device as claimed in claim 11, wherein said at least a portion of the single wafer heat treatment chamber, which is kept at the third temperature, includes a moisture inlet portion. 14. A method for fabricating a semiconductor integrated circuit device as claimed in claim 13, wherein said at least a portion of the single wafer heat treatment chamber, which is kept at the third temperature, includes a wafer inlet potion. 15. A method for fabricating a semiconductor integrated circuit device as claimed in claim 14, wherein the moisture to be transferred into the single wafer heat treatment chamber is pre-heated up to the third temperature prior to transfer into the single wafer heat treatment chamber. 16. A method for fabricating a semiconductor integrated circuit device as claimed in claim 15, wherein said at least a portion of the single wafer heat treatment chamber, which is kept at the third temperature, includes a central portion thereof where the wafer is placed and processed. 17. A method for fabricating a semiconductor integrated circuit device as claimed in claim 16, wherein the silicon member is the first major surface of the wafer. 18. A method for fabricating a semiconductor integrated circuit device, comprising the steps of: (a) synthesizing moisture, at a first temperature, from oxygen gas and hydrogen gas by use of a catalyst in a moisture synthesizing portion, to produce synthesized moisture; (b) transferring the synthesized moisture into a single wafer heat treatment chamber of an oxidation furnace, to form a wet oxidative atmosphere over a first major surface of a wafer inside the chamber, while keeping the moisture in a gaseous state, at least a portion of said single wafer heat treatment chamber being pre-heated up to a second temperature so as to prevent moisture condensation from taking place; and (c) performing thermal oxidation treatment of a silicon member over the first major surface of the wafer, in the wet oxidative atmosphere in the single wafer heat treatment chamber, by lamp-heating the first major surface of the wafer up to a third temperature higher than the first and second temperatures. 19. A method for fabricating a semiconductor integrated circuit device as claimed in claim 18, wherein said at least a portion of the single wafer heat treatment chamber, which is kept at the second temperature, includes a moisture inlet portion. 20. A method for fabricating a semiconductor integrated circuit device as claimed in claim 18, wherein said at least a portion of the single wafer heat treatment chamber, which is kept at the second temperature, includes a wafer inlet portion. 21. A method for fabricating a semiconductor integrated circuit device as claimed in claim 18, wherein said at least a
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