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특허 상세정보

Circuit for protection from excess temperature

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H02H-005/04    H02H-007/00   
미국특허분류(USC) 361/103; 361/104; 361/093.8
출원번호 US-0424478 (1700-01-01)
우선권정보 DE-0022300 (1997-05-28)
국제출원번호 PCT/DE98/00809 (1998-03-19)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Kenyon & Kenyon
인용정보 피인용 횟수 : 3  인용 특허 : 11
초록

An integrated circuit having a power transistor and a circuit arrangement functioning in a temperature dependant manner and thermally coupled to the power transitor. The integrated circuit is used to reliably disconnect the power transistor in the event of overheating., particularly in the case of inductive loads, and does not reactivate the power transistor until, for example, an edge change has occurred at the base terminal of the integrated circuit.

대표
청구항

An integrated circuit having a power transistor and a circuit arrangement functioning in a temperature dependant manner and thermally coupled to the power transitor. The integrated circuit is used to reliably disconnect the power transistor in the event of overheating., particularly in the case of inductive loads, and does not reactivate the power transistor until, for example, an edge change has occurred at the base terminal of the integrated circuit. m the second hub closed position to the open position in response to movement of the first hub from the...

이 특허에 인용된 특허 (11)

  1. Sakamoto Kozo (Hachiouji JPX) Yoshida Isao (Hinode-machi JPX) Otaka Shigeo (Takasaki JPX) Iijima Tetsuo (Maebashi JPX) Shono Harutora (Gunma-machi JPX) Uchid Ken (Higashiyamato JPX) Kobayashi Masayos. Insulated gate semiconductor device and driving circuit device and electronic system both using the same. USP1997065642252.
  2. Sakamoto Kozo,JPX ; Yoshida Isao,JPX. Insulated gate type semiconductor apparatus with a control circuit. USP2000056057998.
  3. Chemla Guy,ILX. Integrated circuit temperature monitoring and protection system. USP1998095805403.
  4. Davies Robert B. (Tempe AZ) Mietus David F. (Phoenix AZ). Multi-lead protected power device having current and boot-strap inputs. USP1995055418674.
  5. Brown Alan E. (Georgetown TX). Over temperature memory circuit. USP1996105568350.
  6. Nadd Bruno C. (Puyvert FRX). Power MOSFET with overcurrent and over-temperature protection. USP1996035497285.
  7. Nadd Bruno C. (Puyvert FRX). Protected three-pin mosgated power switch with separate input reset signal level. USP1996105563759.
  8. Sakamoto Kozo (Hechiouji JPX) Yoshida Isao (Nishitama-gun JPX) Morikawa Masatoshi (Hachiouji JPX) Ohtaka Shigeo (Takasaki JPX) Tsunoda Hideki (Akishima JPX). Semiconductor device having a protection circuit, and electronic system including the same. USP1997065638246.
  9. Bennett Paul T. (Phoenix AZ) Dunn William C. (Mesa AZ). Thermal clamp for an ignition coil driver. USP1991095045964.
  10. Mietus David F. (Phoenix AZ) Davies Robert B. (Tempe AZ). Three leaded protected power device having voltage input. USP1995065424897.
  11. Congdon James S. (Santa Clara CA) Isbell Tim D. (San Jose CA). Two stage thermal shutdown. USP1982084345218.