[특허]Engine exhaust gas recirculation particle trap

Engine exhaust gas recirculation particle trap 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	F01N-003/02
출원번호	US-0775412 (2001-02-01)
발명자 / 주소	Lucas, Michael Schneider, Matthew Oldham, Louis P. Dringenburg, Dean
출원인 / 주소	Cummins, Inc.
대리인 / 주소	Barnes & Thornburg
인용정보	피인용 횟수 : 15 인용 특허 : 32

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An exhaust gas recirculation system for an internal combustion engine includes intake and exhaust manifolds that respectively receive ambient air and expel exhaust gas. A recirculation line fluidly connects the exhaust and intake manifolds. An exhaust gas recirculation valve is included in the recirculation line and is controlled to distribute exhaust gas into the intake manifold. A particle trap is arranged to receive all of the exhaust gases from the exhaust manifold and includes a particle collection chamber therein. A stagnation region is provided within the particle trap such that all the exhaust gas passed through the exhaust gas particle trap is directed toward the stagnation region therein and at least a portion of debris carried with the exhaust gas is retained within the particle collection chamber. e comprising: a latch circuit having a data input terminal and a timing input terminal; a first input terminal coupled to the data input terminal of the latch circuit; a second input terminal coupled to the timing input terminal of the latch circuit; a delay circuit coupled between the first input terminal and the second input terminal; a test signal input terminal coupled to at least one of a first node between the first input terminal and the delay circuit and a second node between the second input terminal and the delay circuit; and a switching portion for transmitting a test signal, which is supplied to the test signal input terminal, to one of the data input terminal, and the timing input terminal and transmitting the test signal via the delay circuit to the other one of the data input terminal and the timing input terminal. 10. A semiconductor integrated circuit device comprising: a latch circuit having a first data input terminal, a first timing input terminal and a first output terminal; a first input terminal coupled to the first timing input terminal of the latch circuit; a delay circuit, coupled between the first input terminal and the first data input terminal; a reference latch circuit having a second data input terminal, a second timing input terminal and a second output terminal, wherein the second timing input terminal of the reference latch circuit is coupled to the first timing input terminal of the latch circuit and the first data input terminal; a second input terminal coupled to the second data input terminal; a reference delay circuit coupled between the first data input terminal of the latch circuit and the second data input terminal of the reference latch circuit; a comparator coupled to the first output terminal of the latch circuit and the second output terminal of the reference latch circuit; and a switching portion for transmitting an input signal, which is supplied to one of the first and second input terminals, to one of the second data input terminal and a group of the first and second timing input terminals, transmitting the input signal via the delay circuit to the first data input terminal, and transmitting the input signal via the delay circuit and the reference delay circuit to one of the second data input terminal and the group of the first and second timing input terminals. 11. A method of testing one of a setup time and a hold time of a latch circuit of a semiconductor integrated circuit, the latch circuit having a data input terminal and a timing input terminal, a delay circuit being coupled between the data input terminal and the timing input terminal, the method comprising the steps of: supplying a test signal to one of the data input terminal and the timing input terminal of the latch circuit using a switching portion; delaying the test signal with the delay circuit; providing the test signal delayed by the delay circuit to the other one of the data input terminal and the timing input terminal of the latch circuit using the switching portion. 12. The method of claim 11, wherein the step of supplying the test signal includes supplying the test signal to the data input terminal in a warranty test of the setup time of the latch circuit, and supplying the test signal to the timing input terminal in a warranty test of the hold time of the latch circuit. 13. The method of claim 12, wherein the warranty test is performed based on a relationship between the edge of the test signal and the edge of the delayed test signal. 14. The method of claim 11, wherein the test signal has a pulse width which corresponds to a total of a delay time of the delay circuit and an operation warranty time of the latch circuit, and wherein the step of supplying the test signal includes supplying the test signal to the timing input terminal in a warranty test of the setup time of the latch circuit, and supplying the test signal to the data input terminal in a warranty test of the hold t

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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Engine exhaust gas recirculation particle trap 원문보기

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이 특허에 인용된 특허 (32)

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