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Heterointegration of materials using deposition and bonding 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B32B-015/00
  • C30B-029/40
출원번호 US-0764182 (2001-01-17)
발명자 / 주소
  • Fitzgerald, Eugene A.
출원인 / 주소
  • AmberWave Systems Corporation
대리인 / 주소
    Testa, Hurwitz & Thibeault, LLP
인용정보 피인용 횟수 : 59  인용 특허 : 63

초록

A semiconductor structure including a first substrate, and an epitaxial layer bonded to the substrate. The epitaxial layer has a threading dislocation density of less than 107cm-2and an in-plane lattice constant that is different from that of the first substrate and a second substrate on which the e

대표청구항

A semiconductor structure including a first substrate, and an epitaxial layer bonded to the substrate. The epitaxial layer has a threading dislocation density of less than 107cm-2and an in-plane lattice constant that is different from that of the first substrate and a second substrate on which the e

이 특허에 인용된 특허 (63)

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  6. Fitzgerald Eugene A., Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization.
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  22. Nakato Tatsuo, Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant.
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  28. Mori Kazuo,JPX, Method of bonding a III-V group compound semiconductor layer on a silicon substrate.
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  32. Fiorini Paolo,BEX ; Sedky Sherif,EGX ; Caymax Matty,BEX ; Baert Christiaan,BEX, Method of fabrication of an infrared radiation detector and infrared detector device.
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  53. Sugiyama Naoharu,JPX ; Kurobe Atsushi,JPX, Semiconductor device and memory device.
  54. Fitzgerald ; Jr. Eugene A. (Bridgewater NJ), Semiconductor devices with low dislocation defects.
  55. Brasen Daniel (Lake Hiawatha NJ) Fitzgerald ; Jr. Eugene A. (Bridgewater NJ) Green Martin L. (New Providence NJ) Monroe Donald P. (Berkeley Heights NJ) Silverman Paul J. (Millburn NJ) Xie Ya-Hong (Fl, Semiconductor heterostructure devices with strained semiconductor layers.
  56. Nakagawa Kiyokazu (Sayama JPX) Nishida Akio (Misato JPX) Shimada Toshikazu (Kokubunji JPX), Semiconductor optical device, manufacturing method for the same, and opto-electronic integrated circuit using the same.
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  63. Augusto Carlos Jorge Ramiro Proenca,BEX, Vertical MISFET devices.

이 특허를 인용한 특허 (59)

  1. Currie,Matthew T., Control of strain in device layers by prevention of relaxation.
  2. Currie,Matthew T., Control of strain in device layers by selective relaxation.
  3. Fitzgerald, Eugene A., Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization.
  4. Fitzgerald,Eugene A., Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization.
  5. Fitzgerald,Eugene A., Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization.
  6. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Doped metal germanide and methods for making the same.
  7. Lochtefeld, Anthony J.; Langdo, Thomas A.; Westhoff, Richard, Elevated source and drain elements for strained-channel heterojuntion field-effect transistors.
  8. Wu,Kenneth C.; Fitzgerald,Eugene A.; Taraschi,Gianni; Borenstein,Jeffrey T., Etch stop layer system.
  9. Andrieu, François; Ernst, Thomas; Deleonibus, Simon, Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor.
  10. Savage,Donald E.; Roberts,Michelle M.; Lagally,Max G., Fabrication of strained heterojunction structures.
  11. Fitzgerald, Eugene A., Heterointegration of materials using deposition and bonding.
  12. Currie, Matthew T., Hybrid fin field-effect transistor structures and related methods.
  13. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., III-V semiconductor device structures.
  14. Sudo,Gaku, LOCOS on SOI and HOT semiconductor device and method for manufacturing.
  15. Fitzgerald, Eugene A., Low threading dislocation density relaxed mismatched epilayers without high temperature growth.
  16. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Metal silicide, metal germanide, methods for making the same.
  17. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Metal silicide, metal germanide, methods for making the same.
  18. Fitzgerald, Eugene A.; Gerrish, Nicole, Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS.
  19. Cheng,Zhiyuan; Fitzgerald,Eugene A.; Antoniadis,Dimitri A., Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers.
  20. Chu, Jack O.; Huang, Feng-Yi; Koester, Steven J.; Sadana, Devendra K., Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen.
  21. Maa, Jer-Shen; Lee, Jong-Jan; Tweet, Douglas J.; Droes, Steve Roy, Method of making relaxed silicon-germanium on glass via layer transfer.
  22. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Methods for depositing nickel films and for making nickel silicide and nickel germanide.
  23. Fitzgerald,Eugene; Currie,Matthew, Methods for fabricating strained layers on semiconductor substrates.
  24. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming III-V semiconductor device structures.
  25. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain.
  26. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes.
  27. Fitzgerald, Eugene A., Methods of fabricating contact regions for FET incorporating SiGe.
  28. Vineis,Christopher; Yang,Vicky; Currie,Matthew; Westhoff,Richard; Leitz,Christopher, Methods of fabricating semiconductor heterostructures.
  29. Langdo,Thomas A.; Lochtefeld,Anthony J., Methods of fabricating semiconductor structures having epitaxially grown source and drain elements.
  30. Langdo,Thomas A.; Lochtefeld,Anthony J., Methods of fabricating semiconductor structures having epitaxially grown source and drain elements.
  31. Currie,Matthew T., Methods of forming hybrid fin field-effect transistor structures.
  32. Woodruff, Jacob Huffman, Methods of forming metal silicides.
  33. Woodruff, Jacob Huffman, Methods of forming metal silicides.
  34. Currie,Matthew T.; Hammond,Richard, Methods of forming reacted conductive gate electrodes.
  35. Langdo, Thomas A.; Currie, Matthew T.; Hammond, Richard; Lochtefeld, Anthony J.; Fitzgerald, Eugene A., Methods of forming strained-semiconductor-on-insulator device structures.
  36. Lochtefeld,Anthony J.; Langdo,Thomas A.; Hammond,Richard; Currie,Matthew T.; Braithwaite,Glyn; Fitzgerald,Eugene A., Methods of forming strained-semiconductor-on-insulator finFET device structures.
  37. Rim, Kern, Multiple gate MOSFET structure with strained Si Fin body.
  38. Lagally, Max G.; Ma, Zhenqiang, PIN diodes for photodetection and high-speed, high-resolution image sensing.
  39. Cheng, Zhi-Yuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A.; Hoyt, Judy L., Process for producing semiconductor article using graded epitaxial growth.
  40. Currie, Matthew T.; Hammond, Richard, Reacted conductive gate electrodes.
  41. Vineis, Christopher J.; Westhoff, Richard; Bulsara, Mayank, Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy.
  42. Fitzgerald,Eugene A., Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuits.
  43. Fitzgerald,Eugene A., Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuits.
  44. Fitzergald, Eugene A., Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits.
  45. Fitzergald, Eugene A., Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits.
  46. Savage, Donald E.; Roberts, Michelle M.; Lagally, Max G., Released freestanding strained heterojunction structures.
  47. Cheng, Zhiyuan; Fitzgerald, Eugene A.; Antoniadis, Dimitri A., Semiconductor device structure.
  48. Vineis,Christopher; Yang,Vicky; Currie,Matthew; Westhoff,Richard; Leitz,Christopher, Semiconductor heterostructures and related methods.
  49. Westhoff,Richard; Yang,Vicky; Currie,Matthew; Vineis,Christopher; Leitz,Christopher, Semiconductor heterostructures having reduced dislocation pile-ups.
  50. Westhoff, Richard; Yang, Vicky K.; Currie, Matthew T.; Vineis, Christopher; Leitz, Christopher, Semiconductor heterostructures having reduced dislocation pile-ups and related methods.
  51. Westhoff,Richard; Vineis,Christopher J.; Currie,Matthew T.; Yang,Vicky T.; Leitz,Christopher W., Semiconductor structures with structural homogeneity.
  52. Currie,Matthew T.; Lochtefeld,Anthony J., Shallow trench isolation process.
  53. Bedell,Stephen W.; Chen,Huajie; Fogel,Keith E.; Sadana,Devendra K., SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth.
  54. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained germanium-on-insulator device structures.
  55. Maa,Jer shen; Lee,Jong Jan; Tweet,Douglas J.; Evans,David R.; Burmaster,Allen W.; Hsu,Sheng Teng, Strained silicon on insulator from film transfer and relaxation by hydrogen implantation.
  56. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  57. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures.
  58. Langdo,Thomas A.; Currie,Matthew T.; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator device structures with elevated source/drain regions.
  59. Langdo,Thomas A.; Currie,Matthew T.; Braithwaite,Glyn; Hammond,Richard; Lochtefeld,Anthony J.; Fitzgerald,Eugene A., Strained-semiconductor-on-insulator finFET device structures.
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