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Porous power and ground planes for reduced PCB delamination and better reliability

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B32B-003/10
  • B32B-015/00
  • B32B-003/00
  • B32B-007/00
  • H05K-001/11
  • H05K-001/23
  • H05K-001/09
  • H05K-001/02
  • H05K-001/14
  • H05K-007/02
  • H05K-007/06
  • H05K-007/08
출원번호 US-0300762 (1999-04-26)
발명자 / 주소
  • Japp, Robert M.
  • Poliks, Mark D.
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Schmeiser, Olsen & Watts
인용정보 피인용 횟수 : 32  인용 특허 : 12

초록

Power and ground planes used in Printed Circuit Boards (PCBs) having porous, conductive materials allow liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filamen

대표청구항

Power and ground planes used in Printed Circuit Boards (PCBs) having porous, conductive materials allow liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filamen

이 특허에 인용된 특허 (12)

  1. Swamy N. Deepak (Austin TX), Apparatus and method of making laminate an embedded conductive layer.
  2. Hoffarth Joseph Gerard ; Lauffer John Matthew ; Mahmoud ; deceased Issa Said, Capacitor formed within printed circuit board.
  3. Pommer Richard J. ; Gotro Jeffrey T. ; Androff Nancy M. W. ; Hein Marc D. ; Zarecki Corey J., High density printed circuit substrate and method of fabrication.
  4. Zeitlin Dan B. (Annapolis MD) Branthover John B. (Daytona MD) Smith Brian H. (Easton MD) Piloto Andrew J. (Columbia MD) Lengel Theresa M. (Ellicott City MD) Carlson ; Jr. Robert R. (Severn MD) Shum L, High performance, high current miniaturized low voltage power supply.
  5. Kresge John S. (Binghamton NY) Light David N. (Friendsville PA) Wu Tien Y. (Endwell NY), Laminated electronic package including a power/ground assembly.
  6. Morio Gaku JP; Nobuyuki Ikeguchi JP; Yasuo Tanaka JP; Yoshihiro Kato JP, Method of making through hole with laser, copper-clad laminate suitable for making hole, and auxiliary material for making hole.
  7. Hanson John R. (Richmond MA) Hauser James L. (Lenox MA) Kilfeather ; Jr. James F. (Pittsfield MA) Hendriks Hendrik B. (Becket MA), Multi-layer metal core circuit board laminate with a controlled thermal coefficient of expansion.
  8. Funada Yoshitsugu (Tokyo JPX) Matsui Koji (Tokyo JPX), Multilayer printed circuit board.
  9. Yoshida Kazuo (Otsu JPX) Tada Shinsaku (Otsu JPX) Kitamura Atsushi (Otsu JPX), Porous carbon fiber material with a thin metal film covering each fiber.
  10. Scarlett John A. (Galashiels GB6), Printed circuit boards with solderable plating finishes and method of making the same.
  11. Andry Steven C. (Brooklyn NY), Signal isolating microwave splitters/combiners.
  12. Cohen Bernard (Berkeley Lake GA), Stretchable metallized nonwoven web of non-elastomeric thermoplastic polymer fibers and process to make the same.

이 특허를 인용한 특허 (32)

  1. Elkhatib, Hecham K.; McGrath, James L.; Mendenhall, David W.; MacKillop, William J.; Raclawski, Alan A., Cable assembly with a material at an edge of a substrate.
  2. Elkhatib, Hecham K.; McGrath, James L.; Mendenhall, David W.; MacKillop, William J.; Raclawski, Alan A., Cable assembly with printed circuit board having a ground layer.
  3. Danoski,Charles E.; Memis,Irving; Rosser,Steven G., Circuitized substrate with improved impedance control circuitry, method of making same, electrical assembly and information handling system utilizing same.
  4. Fay,Owen R.; Amrine,Craig S.; Lish,Kevin R., Die encapsulation using a porous carrier.
  5. McGrath, James L.; Mendenhall, David W.; Elkhatib, Hecham K.; MacKillop, William J.; Raclawski, Alan A., Electrical connector.
  6. Shibuya, Hiroki, Electronic device with delamination resistant wiring board.
  7. Buvid, Daniel J.; Campbell, Eric J.; Czaplewski, Sarah K.; Steffen, Christopher W., Fluid cooled trace/via hybrid structure and method of manufacture.
  8. Schneider, Douglas; Davis, William E., Graphene-based thermal management cores and systems and methods for constructing printed wiring boards.
  9. White, George E.; Dalmia, Sidharth; Sundaram, Venkatesh; Swaminathan, Madhavan, Heterogeneous organic laminate stack ups for high frequency applications.
  10. Carlson, Brian L.; Dangler, John R.; Kuczynski, Joseph; Taylor, Jeffrey A., Implementing reduced drill smear.
  11. Jiang, Xiaohong; Shi, Hong, Integrated circuit package with reduced pad capacitance.
  12. Asakawa, Koji; Hotta, Yasuyuki; Matake, Shigeru; Hiraoka, Toshiro, Mask used for exposing a porous substrate.
  13. Li, Yonggang; Salama, Islam; Gurumurthy, Charan, Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method.
  14. Li, Yonggang; Salama, Islam; Gurumurthy, Charan; Azimi, Hamid, Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method.
  15. Li, Yonggang; Salama, Islam; Gurumurthy, Charan; Azimi, Hamid, Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method.
  16. Viswanathan, Lakshminarayan; Maalouf, Elie A.; Tucker, Geoffrey, Microelectronic modules with sinter-bonded heat dissipation structures and methods for the fabrication thereof.
  17. Tani,Motoaki; Hayashi,Nobuyuki; Abe,Tomoyuki; Takahashi,Yasuhito; Shuto,Takashi, Multilayer wiring board.
  18. Japp, Robert M.; Poliks, Mark D., Porous power and ground planes for reduced PCB delamination and better reliability.
  19. Ou, Guang-Feng; Huang, Yong-Zhao, Printed circuit board.
  20. Samejima, Souhei; Sato, Sadao; Osuga, Hiroyuki; Utsumi, Shigeru; Kumada, Teruhiko, Printed circuit board and method of manufacturing the same.
  21. Ogawa, Minoru; Nishimoto, Kazuto, Printed circuit board assembly and method of manufacturing the same.
  22. Somei,Junichi, Printed circuit board, radio wave receiving converter, and antenna device.
  23. Ueda, Kazuyuki; Adachi, Takema; Yoshikawa, Kazuhiro, Printed wiring board and method for manufacturing printed wiring board.
  24. Vasoya, Kalu K., Processes for manufacturing printed wiring boards.
  25. Vasoya, Kalu K., Processes for manufacturing printed wiring boards.
  26. Ng, Kok-Siang; Wong, King Keong; Ryan, Michael E., Reference layer openings.
  27. Ng,Kok Siang; Wong,King Keong; Ryan,Michael E., Reference layer openings.
  28. Dozen, Yoshitaka; Sugiyama, Eiji; Ohtani, Hisashi; Tsurume, Takuya, Semiconductor device and product tracing system utilizing the semiconductor device having top and bottom fibrous sealing layers.
  29. Dudnikov, Jr., George, Simultaneous and selective partitioning of via structures using plating resist.
  30. Iketani, Shinichi; Kersten, Dale; Dudnikov, Jr., George, Simultaneous and selective wide gap partitioning of via structures using plating resist.
  31. Berke, Stuart Allen; Farkas, Sandor; Mutnury, Bhyrav M., Structure to dampen barrel resonance of unused portion of printed circuit board via.
  32. Vincent, Michael B.; Duong, Trung Q.; Gong, Zhiwei; Hayes, Scott M.; Magnus, Alan J.; Mitchell, Douglas G.; Pabst, Eduard J.; Wright, Jason R.; Yap, Weng F., Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layers.
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