초록 ▼

A process for manufacturing a semiconductor substrate, comprising the step of preparing a first substrate which has a surface layer portion subjected to hydrogen annealing, the separation-layer formation step of implanting ions of hydrogen or the like into the first substrate from the side of the su

A process for manufacturing a semiconductor substrate, comprising the step of preparing a first substrate which has a surface layer portion subjected to hydrogen annealing, the separation-layer formation step of implanting ions of hydrogen or the like into the first substrate from the side of the surface layer portion, thereby to form a separation layer, the adhesion step of bonding the first substrate and a second substrate to each other so that the surface layer portion may lie inside, thereby to form a multilayer structure, and the transfer step of separating the multilayer structure by utilizing the separation layer, thereby to transfer the less-defective layer of the surface layer portion onto the second substrate. The less-defective layer is a single-crystal silicon layer in which defects inherent in a bulk wafer, such as COPs and FPDs, are decreased.

대표청구항 ▼

A process for manufacturing a semiconductor substrate, comprising the step of preparing a first substrate which has a surface layer portion subjected to hydrogen annealing, the separation-layer formation step of implanting ions of hydrogen or the like into the first substrate from the side of the su

A process for manufacturing a semiconductor substrate, comprising the step of preparing a first substrate which has a surface layer portion subjected to hydrogen annealing, the separation-layer formation step of implanting ions of hydrogen or the like into the first substrate from the side of the surface layer portion, thereby to form a separation layer, the adhesion step of bonding the first substrate and a second substrate to each other so that the surface layer portion may lie inside, thereby to form a multilayer structure, and the transfer step of separating the multilayer structure by utilizing the separation layer, thereby to transfer the less-defective layer of the surface layer portion onto the second substrate. The less-defective layer is a single-crystal silicon layer in which defects inherent in a bulk wafer, such as COPs and FPDs, are decreased. forming a sensing pad on said first substrate and separately coupling said backplane to said sensing pad; driving said backplane to a specified voltage from said interconnection pad; and testing said actual backplane voltage from said sensing pad. 14. The method as defined in claim 7 further comprising forming separate driver contact pads on said first substrate for each said row line and each said column line. 15. The method as defined in claim 14 further comprising providing display drive electronics and bonding the display drive electronics to said driver contact pads to couple the display electronics to the pads and testing the display electronic couplings. 16. The method as defined in claim 15 further comprising forming said driver contact pads on said substrate on the opposite side from said shorting bars. 17. The method as defined in claim 16 further comprising decoupling said shorting bars from said row lines and said column lines by physically removing said shorting bars. 18. The method as defined in claim 1 further comprising forming each shorting bar of said first set of shorting bars having a resistance of about 20 ohms and forming said resistor having a resistance of at least 2000 ohms. 19. A method of manufacturing active matrix displays comprising a plurality of thin film transistors, each transistor coupling a pixel to a row line in the matrix displays, said method comprising: forming at least a first set of inner shorting bars adjacent to the display matrix on a first substrate, each shorting bar having a first resistance; coupling in parallel, a first one of said shorting bars to all the row lines; forming row driver contact pads adjacent said display matrix on a side opposite said first one of said shorting bars; coupling in parallel, a second one of said shorting bars to all the column lines; forming column driver contact pads adjacent said display matrix on a side opposite said second one of said shorting bars; and coupling said shorting bars to one another by a resistor having a magnitude about one hundred times greater than the first resistance. 20. The method as defined in claim 19 further comprising decoupling said first and second shorting bars from said column lines and said row lines. 21. The method as defined in claim 20, wherein said decoupling further comprises physically removing said first and second sing bars from said first substrate. 22. The method as defined it claim 21, wherein said removing is performed by a laser physically cutting to an edge of said display matrix adjacent said first and second one of said shorting bars. 23. The method as defined in claim 21, wherein said removing is performed by grinding the top of said substrate to an edge of said display matrix adjacent said first and second one of said shoring bars. 24. The method as defined in claim 21, wherein said removing is performed by grinding an edge of said substrate up to an edge of said display matrix adjacent said first and second one of said shorting bars. 25. The method as defined in claim 19 further comprising forming at least a second set of outer shorting bars adjacent said first set of shorting bars and connecting each one of said second set of shorting bars to a respective one of said first set of shorting bars. 26. The method as defined in claim 19 further comprising forming said first set of shorting bars with said row lines. 27. The method as defined in claim 26 further comprising forming said column lines from metal coupled to said second shorting bar. 28. The method as defined in claim 27 further comprising depositing said column line metal onto said first set of shorting bars to decrease the resistance of said shoring bars. 29. The method as defined in claim 27 further comprising forming a transistor and a pixel pad for each intersection of column and row lines and testing said transistors and said pixels with said shorting bars. 30. The method as defined in claim 29 further comprising coupli ng a backplane on a second substrate to said first substrate including a liquid crystal material therebetween and including coupling said backplane to said first set of shorting bars to provide ESD protection. 31. The method as defined in claim 30 further comprising providing display drive electronics and bonding the display drive electronics to said first substrate to couple the drive electronics to the substrate and testing the drive electronics coupling. 32. The method as defined in claim 31 further comprising decoupling said first set of shorting bars from said backplane, said row lines and said column lines after said drive electronics coupling is tested. 33. The method as defined in claim 32 further comprising testing said first set of shorting bars to ensure that the bars are decoupled. 34. The method as defined in claim 32 further comprising decoupling said shorting bars from said row lines and said column lines by utilizing a laser to open the couplings between said shorting bars and said row lines and column lines. 35. The method as defined in claim 34 further comprising decoupling said shorting bars from one another. 36. The method as defined in claim 30 further comprising: forming at least one interconnection pad on said first substrate and coupling said backplane to said interconnection pad; forming a sensing pad on said first substrate and separately coupling said backplane to said sensing pad; driving said backplane to a specified voltage from said interconnection pad; and testing said actual backplane voltage from said sensing pad. 37. The method as defined in claim 30 further comprising forming separate row and column drivers contact pads on said first substrate for each said row line and each said column line. 38. The method as defined in claim 37 further comprising providing display drive electronics and bonding the display drive electronics to said row and column driver contact pads to couple the display electronics to the pads and testing the display electronic couplings. 39. The method as defined in claim 38 further comprising decoupling said shorting bars from said row lines and said column lines by physically removing said shorting bars. 40. The method as defined in claim 19 further comprising forming each shorting bar of said first set of shorting bars having a resistance of about 20 ohms and forming said resistor having a resistance of at least 2000 ohms. 41. A method of manufacturing active matrix displays comprising a plurality of thin film transistors, each transistor coupling a pixel to a row line in the matrix displays, said method comprising: forming at least a first set of finer shorting bars adjacent to the display matrix on a first substrate, each shorting bar having a first resistance; coupling in parallel, a first one of said shorting bars to all the row lines; forming row driver contact pads adjacent said display matrix on a side adjacent said first shorting bar; coupling in parallel, a second one of said shorting bars to all the column lines; forming column driver contact pads adjacent said display matrix on a side adjacent said second shorting bar; and coupling said shorting bars to one another by a resistor having a magnitude about one hundred times greater than the first resistance. 42. The method as defined in claim 41 further comprising decoupling said first and second shorting bar from said column lines and said row lines. 43. The method as defined in claim 42, wherein said decoupling further comprises physically removing said first and second shorting bar from said first substrate. 44. The method as defined in claim 43, wherein said removing is performed by a laser physically cutting to an edge of said display matrix adjacent said fist and second one of said shorting bars. 45. The method as defined in claim 43, wherein said removing is performed by grinding the top of said substrate to an edge of said display matrix adjacent said first and second one of said short ing bars. 46. The method as defined in claim 43, wherein said removing is performed by grinding an edge of said substrate up to an edge of said display matrix adjacent said first and second one of said shorting bars. 47. The method as defined in claim 41 further comprising coupling a third shorting bar to said first shorting bar and coupling a fourth shorting bar to said second shorting bar. method according to claim 11, wherein heating the chamber includes heating the chamber to at least 100 degrees (C.). 13. The method according to claim 11, wherein heating the chamber includes heating the chamber to at least 200 degrees (C.). 14. The method according to claim 11, wherein heating the chamber includes heating the chamber to at least 300 degrees (C.). 15. A method of forming a film on a subs