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Lead frame for the installation of an integrated circuit in an injection-molded package 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-007/20
  • H01L-023/495
  • H01L-023/34
출원번호 US-0220745 (1998-12-23)
우선권정보 DE-0025228 (1996-06-24)
발명자 / 주소
  • Hauser, Christian
  • Schmidt, Helge
  • Winderl, Johann
출원인 / 주소
  • Infineon Technologies AG
대리인 / 주소
    Greenberg, Lawrence A.Stemer, Werner H.Locher, Ralph E.
인용정보 피인용 횟수 : 4  인용 특허 : 35

초록

The lead frame has a spring element, which can be compressed during the injection molding of the package by an injection mold. The resultant resilience has the effect that a contact surface of the lead is pressed against an inside wall of the injection mold. The biasing of the contact surface agains

대표청구항

1. A lead frame formed by injection molding in a mold having an inside wall, the lead frame comprising: an integrated circuit; an enclosure encapsulating said integrated circuit; and at least one lead formed with a contact face electrically bonded to said integrated circuit; said at least one

이 특허에 인용된 특허 (35)

  1. Saxelby ; Jr. John R. ; Hedlund ; III Walter R., Apparatus for circuit encapsulation.
  2. Haghiri-Tehrani Yahya (Munich DEX) Hoppe Joachim (Munich DEX), Carrier element for an IC module.
  3. Sekiguchi Yoshinori,JPX ; Aoki Munekazu,JPX, Chip type electronic part.
  4. Kohara Masanobu (Hyogo JPX), Electronic device.
  5. Variot Patrick (San Jose CA), GPT system for encapsulating an integrated circuit package.
  6. Farnworth Warren M., Heat transfer material for an improved die edge contacting socket.
  7. Steijer Odd,SEX ; Moll Hans-Christer,SEX ; Eriksen Paul,SEX ; Engstrand Jan-.ANG.ke,SEX, Injection of encapsulating material on an optocomponent.
  8. Fierkens Richard H. J. (Keurbeck 15 6914 AE Herwen NLX), Integrated circuit lead frame positioner apparatus and method.
  9. Mach Terry P. ; Jackson Kurt R. ; Hodges Frank ; Glover Alfred H. ; Dave Chandrakant ; Morris Stephen J. ; Betterton Joseph T., Mechanism for removing heat from electronic components.
  10. Groves Lloyd A. (Galveston IN) Whelchel Phil O. (Tipton IN), Method for forming a lead during molding of an electronic housing.
  11. Fehr Gerald K. (Cupertino CA), Method for forming encapsulated IC packages.
  12. Marrs Robert C. (Scottsdale AZ), Method for forming plastic molded package with heat sink for integrated circuit devices.
  13. Sankhagowit Thanomsak (San Jose CA), Method for making a pre-testable semiconductor die package.
  14. Djennas Frank (Austin TX) Nomi Victor K. (Round Rock TX) Pastore John R. (Leander TX) Reeves Twila J. (Austin TX) Postlethwait Les (Lexington TX), Method for making semiconductor device having no die supporting surface.
  15. Kodai Shojiro (Itami JPX) Ochi Katsunori (Itami JPX) Baba Fumiaki (Amagasaki JPX), Method for manufacturing an encapsulated IC card having a molded frame and a circuit board.
  16. Matsumura Tsuneo (Shiki JPX) Konishi Atsuo (Kitakatsuragi JPX) Shirai Kouji (Kishiwada JPX), Method of manufacturing a resin-sealed semiconductor device.
  17. Murphy James V. (Warwick RI) Murphy Michael J. (East Greenwich RI), Molded-in lead frames.
  18. Sakamoto Akira,JPX ; Sera Kazuhiko,JPX ; Oyama Kazunari,JPX, Mounting structure for electronic part.
  19. Farnworth Warren M. ; Wood Alan G. ; Corbett Tim J., Multi-die encapsulation device.
  20. Endoh Tetsuo,JPX ; Tanaka Yoshiyuki,JPX ; Aritome Seiichi,JPX ; Shirota Riichiro,JPX ; Shuto Susumu,JPX ; Tanaka Tomoharu,JPX ; Hemink Gertjan,JPX ; Tanzawa Toru,JPX, Non-volatile semiconductor memory device.
  21. Hasegawa Miki (Kyoto JPX), Packaging device and its manufacturing method.
  22. Mehringer Larry H. ; Oh Charlie, Packaging of semiconductor circuit in pre-molded plastic package.
  23. Marrs Robert C. (Scottsdale AZ), Plastic molded package with heat sink for integrated circuit devices.
  24. Pai Deepak K. (Burnsville MN) Krinke Terrance A. (Roseville MN), Plated compliant lead.
  25. Kuriyama Chojiro (Kyoto JPX), Polar electronic component and mounting structure therefor.
  26. Hinterlechner Gerhard,DEX, Process and device for the shaping of leads of integrated circuits.
  27. Hasegawa Miki (Kyoto JPX) Kanetake Yasuo (Kyoto JPX), Resin-packaged electronic component having bent lead terminals.
  28. Maley Thomas C. (Medway MA) Boden Mark W. (Millbury MA) D\Orazio Paul A. (Mendon MA) Dalzell Bonnie C. (Sherborn MA) Edelman Peter G. (Franklin MA) Flaherty James E. (Attleboro MA) Green Robert B. (H, Sample chamber.
  29. Kim Jae J. (Seoul KRX) Kim Dong K. (Chunan KRX) Ahn Seung H. (Suwon KRX), Semiconductor assembly for a three-dimensional integrated circuit package.
  30. Tazawa Hiroshi (Tokyo JPX) Takubo Chiaki (Yokohama JPX) Tsuboi Yoshiharu (Yokohama JPX) Sasaki Mamoru (Tokyo JPX), Semiconductor assembly having laminated semiconductor devices.
  31. Suzuki Yasuhiro (Tokyo JPX), Semiconductor device of vertical surface-mounting type.
  32. Miyoshi Tadayoshi,JPX, Semiconductor package having semiconductor element, mounting structure of semiconductor package mounted on circuit boar.
  33. Ishikawa Toru (Tokyo JPX), Surface mount semiconductor device.
  34. Masuda Masachika,JPX ; Wada Tamaki,JPX, Thin type semiconductor device, module structure using the device and method of mounting the device on board.
  35. Masuda Masachika,JPX ; Wada Tamaki,JPX, Thin type semiconductor device, module structure using the device and method of mounting the device on board.

이 특허를 인용한 특허 (4)

  1. Bolken,Todd O., Alternative method used to package multimedia card by transfer molding.
  2. Kim, Tae il; Jung, Soonkwang, Battery pack.
  3. Zhang,Wenwei, Low-cost compact bar code sensor.
  4. Wensel,Richard W., Semiconductor die with attached heat sink and transfer mold.
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